X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FMachineInstr.cpp;h=3dce6fc85deb8f62e6b99b36625c8c107fa91d77;hb=da8d96d1a1769d0614c46d9880ac3c21cbc8e74c;hp=ccb52c2c981988424246466d957d8f53e826a227;hpb=697954c15da58bd8b186dbafdedd8b06db770201;p=oota-llvm.git diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index ccb52c2c981..3dce6fc85de 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -1,439 +1,489 @@ -// $Id$ -//*************************************************************************** -// File: -// MachineInstr.cpp +//===-- MachineInstr.cpp --------------------------------------------------===// // -// Purpose: -// -// -// Strategy: +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. // -// History: -// 7/2/01 - Vikram Adve - Created -//**************************************************************************/ - +//===----------------------------------------------------------------------===// +// +// Methods common to all machine instructions. +// +// FIXME: Now that MachineInstrs have parent pointers, they should always +// print themselves using their MachineFunction's TargetMachine. +// +//===----------------------------------------------------------------------===// #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/Target/MachineFrameInfo.h" -#include "llvm/Target/MachineRegInfo.h" -#include "llvm/Target/MachineCacheInfo.h" -#include "llvm/Method.h" -#include "llvm/iOther.h" -#include "llvm/Instruction.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/Value.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/Target/MRegisterInfo.h" +#include "llvm/Support/LeakDetector.h" #include -using std::cerr; - -AnnotationID MachineCodeForMethod::AID( - AnnotationManager::getID("MachineCodeForMethodAnnotation")); - -//************************ Class Implementations **************************/ +using namespace llvm; -// Constructor for instructions with fixed #operands (nearly all) -MachineInstr::MachineInstr(MachineOpCode _opCode, - OpCodeMask _opCodeMask) - : opCode(_opCode), - opCodeMask(_opCodeMask), - operands(TargetInstrDescriptors[_opCode].numOperands) -{ - assert(TargetInstrDescriptors[_opCode].numOperands >= 0); +// Global variable holding an array of descriptors for machine instructions. +// The actual object needs to be created separately for each target machine. +// This variable is initialized and reset by class TargetInstrInfo. +// +// FIXME: This should be a property of the target so that more than one target +// at a time can be active... +// +namespace llvm { + extern const TargetInstrDescriptor *TargetInstrDescriptors; } // Constructor for instructions with variable #operands -MachineInstr::MachineInstr(MachineOpCode _opCode, - unsigned numOperands, - OpCodeMask _opCodeMask) - : opCode(_opCode), - opCodeMask(_opCodeMask), - operands(numOperands) -{ +MachineInstr::MachineInstr(short opcode, unsigned numOperands) + : Opcode(opcode), + numImplicitRefs(0), + operands(numOperands, MachineOperand()), + parent(0) { + // Make sure that we get added to a machine basicblock + LeakDetector::addGarbageObject(this); } -void -MachineInstr::SetMachineOperand(unsigned int i, - MachineOperand::MachineOperandType operandType, - Value* _val, bool isdef=false) -{ - assert(i < operands.size()); - operands[i].Initialize(operandType, _val); - operands[i].isDef = isdef || - TargetInstrDescriptors[opCode].resultPos == (int) i; +/// MachineInstr ctor - This constructor only does a _reserve_ of the operands, +/// not a resize for them. It is expected that if you use this that you call +/// add* methods below to fill up the operands, instead of the Set methods. +/// Eventually, the "resizing" ctors will be phased out. +/// +MachineInstr::MachineInstr(short opcode, unsigned numOperands, bool XX, bool YY) + : Opcode(opcode), numImplicitRefs(0), parent(0) { + operands.reserve(numOperands); + // Make sure that we get added to a machine basicblock + LeakDetector::addGarbageObject(this); } -void -MachineInstr::SetMachineOperand(unsigned int i, - MachineOperand::MachineOperandType operandType, - int64_t intValue, bool isdef=false) -{ - assert(i < operands.size()); - operands[i].InitializeConst(operandType, intValue); - operands[i].isDef = isdef || - TargetInstrDescriptors[opCode].resultPos == (int) i; +/// MachineInstr ctor - Work exactly the same as the ctor above, except that the +/// MachineInstr is created and added to the end of the specified basic block. +/// +MachineInstr::MachineInstr(MachineBasicBlock *MBB, short opcode, + unsigned numOperands) + : Opcode(opcode), numImplicitRefs(0), parent(0) { + assert(MBB && "Cannot use inserting ctor with null basic block!"); + operands.reserve(numOperands); + // Make sure that we get added to a machine basicblock + LeakDetector::addGarbageObject(this); + MBB->push_back(this); // Add instruction to end of basic block! } -void -MachineInstr::SetMachineOperand(unsigned int i, - int regNum, bool isdef=false) -{ - assert(i < operands.size()); - operands[i].InitializeReg(regNum); - operands[i].isDef = isdef || - TargetInstrDescriptors[opCode].resultPos == (int) i; -} +/// MachineInstr ctor - Copies MachineInstr arg exactly +/// +MachineInstr::MachineInstr(const MachineInstr &MI) { + Opcode = MI.getOpcode(); + numImplicitRefs = MI.getNumImplicitRefs(); + operands.reserve(MI.getNumOperands()); -void -MachineInstr::dump(unsigned int indent) const -{ - for (unsigned i=0; i < indent; i++) - cerr << " "; - - cerr << *this; + // Add operands + for (unsigned i = 0; i < MI.getNumOperands(); ++i) + operands.push_back(MachineOperand(MI.getOperand(i))); + + // Set parent, next, and prev to null + parent = 0; + prev = 0; + next = 0; } -std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr) -{ - os << TargetInstrDescriptors[minstr.opCode].opCodeString; - - for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) { - os << "\t" << minstr.getOperand(i); - if( minstr.getOperand(i).opIsDef() ) - os << "*"; - } - -#undef DEBUG_VAL_OP_ITERATOR -#ifdef DEBUG_VAL_OP_ITERATOR - os << "\n\tValue operands are: "; - for (MachineInstr::val_const_op_iterator vo(&minstr); ! vo.done(); ++vo) - { - const Value* val = *vo; - os << val << (vo.isDef()? "(def), " : ", "); - } -#endif - - -#if 1 - // code for printing implict references +MachineInstr::~MachineInstr() { + LeakDetector::removeGarbageObject(this); +} + +/// clone - Create a copy of 'this' instruction that is identical in all ways +/// except the following: the new instruction has no parent and it has no name +/// +MachineInstr* MachineInstr::clone() const { + return new MachineInstr(*this); +} - unsigned NumOfImpRefs = minstr.getNumImplicitRefs(); - if( NumOfImpRefs > 0 ) { - - os << "\tImplicit:"; +/// OperandComplete - Return true if it's illegal to add a new operand +/// +bool MachineInstr::OperandsComplete() const { + int NumOperands = TargetInstrDescriptors[Opcode].numOperands; + if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands) + return true; // Broken: we have all the operands of this instruction! + return false; +} - for(unsigned z=0; z < NumOfImpRefs; z++) { - os << minstr.getImplicitRef(z); - if( minstr.implicitRefIsDefined(z)) os << "*"; - os << "\t"; - } - } +/// replace - Support for replacing opcode and operands of a MachineInstr in +/// place. This only resets the size of the operand vector and initializes it. +/// The new operands must be set explicitly later. +/// +void MachineInstr::replace(short opcode, unsigned numOperands) { + assert(getNumImplicitRefs() == 0 && + "This is probably broken because implicit refs are going to be lost."); + Opcode = opcode; + operands.clear(); + operands.resize(numOperands, MachineOperand()); +} -#endif - return os << "\n"; +void MachineInstr::SetMachineOperandVal(unsigned i, + MachineOperand::MachineOperandType opTy, + Value* V) { + assert(i < operands.size()); // may be explicit or implicit op + operands[i].opType = opTy; + operands[i].contents.value = V; + operands[i].extra.regNum = -1; } -static inline std::ostream &OutputOperand(std::ostream &os, - const MachineOperand &mop) -{ - Value* val; - switch (mop.getOperandType()) - { - case MachineOperand::MO_CCRegister: - case MachineOperand::MO_VirtualRegister: - val = mop.getVRegValue(); - os << "(val "; - if (val && val->hasName()) - os << val->getName(); - else - os << val; - return os << ")"; - case MachineOperand::MO_MachineRegister: - return os << "(" << mop.getMachineRegNum() << ")"; - default: - assert(0 && "Unknown operand type"); - return os; - } +void +MachineInstr::SetMachineOperandConst(unsigned i, + MachineOperand::MachineOperandType opTy, + int intValue) { + assert(i < getNumOperands()); // must be explicit op + assert(TargetInstrDescriptors[Opcode].resultPos != (int) i && + "immed. constant cannot be defined"); + + operands[i].opType = opTy; + operands[i].contents.value = NULL; + operands[i].contents.immedVal = intValue; + operands[i].extra.regNum = -1; + operands[i].flags = 0; } +void MachineInstr::SetMachineOperandReg(unsigned i, int regNum) { + assert(i < getNumOperands()); // must be explicit op -std::ostream &operator<<(std::ostream &os, const MachineOperand &mop) -{ - switch(mop.opType) - { - case MachineOperand::MO_VirtualRegister: - case MachineOperand::MO_MachineRegister: - os << "%reg"; - return OutputOperand(os, mop); - case MachineOperand::MO_CCRegister: - os << "%ccreg"; - return OutputOperand(os, mop); - case MachineOperand::MO_SignExtendedImmed: - return os << (long)mop.immedVal; - case MachineOperand::MO_UnextendedImmed: - return os << (long)mop.immedVal; - case MachineOperand::MO_PCRelativeDisp: - { - const Value* opVal = mop.getVRegValue(); - bool isLabel = isa(opVal) || isa(opVal); - os << "%disp(" << (isLabel? "label " : "addr-of-val "); - if (opVal->hasName()) - os << opVal->getName(); - else - os << opVal; - return os << ")"; - } - default: - assert(0 && "Unrecognized operand type"); - break; - } - - return os; + operands[i].opType = MachineOperand::MO_MachineRegister; + operands[i].contents.value = NULL; + operands[i].extra.regNum = regNum; } -// Align data larger than one L1 cache line on L1 cache line boundaries. -// Align all smaller data on the next higher 2^x boundary (4, 8, ...). -// -// THIS FUNCTION HAS BEEN COPIED FROM EMITASSEMBLY.CPP AND -// SHOULD BE USED DIRECTLY THERE -// -inline unsigned int -SizeToAlignment(unsigned int size, const TargetMachine& target) -{ - unsigned short cacheLineSize = target.getCacheInfo().getCacheLineSize(1); - if (size > (unsigned) cacheLineSize / 2) - return cacheLineSize; - else - for (unsigned sz=1; /*no condition*/; sz *= 2) - if (sz >= size) - return sz; +// Used only by the SPARC back-end. +void MachineInstr::SetRegForOperand(unsigned i, int regNum) { + assert(i < getNumOperands()); // must be explicit op + operands[i].setRegForValue(regNum); } -static unsigned int -ComputeMaxOptionalArgsSize(const TargetMachine& target, const Method* method) +// Used only by the SPARC back-end. +void MachineInstr::SetRegForImplicitRef(unsigned i, int regNum) { + getImplicitOp(i).setRegForValue(regNum); +} + +/// substituteValue - Substitute all occurrences of Value* oldVal with newVal +/// in all operands and all implicit refs. If defsOnly == true, substitute defs +/// only. +/// +/// FIXME: Fold this into its single caller, at SparcInstrSelection.cpp:2865, +/// or make it a static function in that file. +/// +unsigned +MachineInstr::substituteValue(const Value* oldVal, Value* newVal, + bool defsOnly, bool notDefsAndUses, + bool& someArgsWereIgnored) { - const MachineFrameInfo& frameInfo = target.getFrameInfo(); + assert((!defsOnly || !notDefsAndUses) && + "notDefsAndUses is irrelevant if defsOnly == true."); - unsigned int maxSize = 0; - - for (Method::const_inst_iterator I=method->inst_begin(),E=method->inst_end(); - I != E; ++I) - if ((*I)->getOpcode() == Instruction::Call) + unsigned numSubst = 0; + + // Substitute operands + for (MachineInstr::val_op_iterator O = begin(), E = end(); O != E; ++O) + if (*O == oldVal) + if (!defsOnly || + notDefsAndUses && (O.isDef() && !O.isUse()) || + !notDefsAndUses && O.isDef()) { - CallInst* callInst = cast(*I); - unsigned int numOperands = callInst->getNumOperands() - 1; - int numExtra = (int) numOperands - frameInfo.getNumFixedOutgoingArgs(); - if (numExtra <= 0) - continue; - - unsigned int sizeForThisCall; - if (frameInfo.argsOnStackHaveFixedSize()) - { - int argSize = frameInfo.getSizeOfEachArgOnStack(); - sizeForThisCall = numExtra * (unsigned) argSize; - } - else - { - assert(0 && "UNTESTED CODE: Size per stack argument is not fixed on this architecture: use actual arg sizes to compute MaxOptionalArgsSize"); - sizeForThisCall = 0; - for (unsigned i=0; i < numOperands; ++i) - sizeForThisCall += target.findOptimalStorageSize(callInst-> - getOperand(i)->getType()); - } - - if (maxSize < sizeForThisCall) - maxSize = sizeForThisCall; - } - - return maxSize; + O.getMachineOperand().contents.value = newVal; + ++numSubst; + } else + someArgsWereIgnored = true; + + // Substitute implicit refs + for (unsigned i = 0, N = getNumImplicitRefs(); i < N; ++i) + if (getImplicitRef(i) == oldVal) { + MachineOperand Op = getImplicitOp(i); + if (!defsOnly || + notDefsAndUses && (Op.isDef() && !Op.isUse()) || + !notDefsAndUses && Op.isDef()) + { + Op.contents.value = newVal; + ++numSubst; + } else + someArgsWereIgnored = true; + } + return numSubst; } +void MachineInstr::dump() const { + std::cerr << " " << *this; +} -/*ctor*/ -MachineCodeForMethod::MachineCodeForMethod(const Method* _M, - const TargetMachine& target) - : Annotation(AID), - method(_M), compiledAsLeaf(false), staticStackSize(0), - automaticVarsSize(0), regSpillsSize(0), - currentOptionalArgsSize(0), maxOptionalArgsSize(0), - currentTmpValuesSize(0) -{ - maxOptionalArgsSize = ComputeMaxOptionalArgsSize(target, method); - staticStackSize = maxOptionalArgsSize + - target.getFrameInfo().getMinStackFrameSize(); +static inline std::ostream& OutputValue(std::ostream &os, const Value* val) { + os << "(val "; + os << (void*) val; // print address always + if (val && val->hasName()) + os << " " << val->getName(); // print name also, if available + os << ")"; + return os; } -int -MachineCodeForMethod::allocateLocalVar(const TargetMachine& target, - const Value* val, - unsigned int size) -{ - // Check if we've allocated a stack slot for this value already - // - int offset = getOffset(val); - if (offset == INVALID_FRAME_OFFSET) - { - bool growUp; - int firstOffset =target.getFrameInfo().getFirstAutomaticVarOffset(*this, - growUp); - unsigned char align; - if (size == 0) - { - size = target.findOptimalStorageSize(val->getType()); - // align = target.DataLayout.getTypeAlignment(val->getType()); - } - - align = SizeToAlignment(size, target); - - offset = getAutomaticVarsSize(); - if (! growUp) - offset += size; - - if (unsigned int mod = offset % align) - { - offset += align - mod; - size += align - mod; - } - - offset = growUp? firstOffset + offset - : firstOffset - offset; - - offsets[val] = offset; - - incrementAutomaticVarsSize(size); - } - return offset; +static inline void OutputReg(std::ostream &os, unsigned RegNo, + const MRegisterInfo *MRI = 0) { + if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) { + if (MRI) + os << "%" << MRI->get(RegNo).Name; + else + os << "%mreg(" << RegNo << ")"; + } else + os << "%reg" << RegNo; } -int -MachineCodeForMethod::allocateSpilledValue(const TargetMachine& target, - const Type* type) -{ - unsigned int size = target.findOptimalStorageSize(type); - unsigned char align = target.DataLayout.getTypeAlignment(type); +static void print(const MachineOperand &MO, std::ostream &OS, + const TargetMachine *TM) { + const MRegisterInfo *MRI = 0; - bool growUp; - int firstOffset = target.getFrameInfo().getRegSpillAreaOffset(*this, growUp); - - int offset = getRegSpillsSize(); - if (! growUp) - offset += size; + if (TM) MRI = TM->getRegisterInfo(); + + bool CloseParen = true; + if (MO.isHiBits32()) + OS << "%lm("; + else if (MO.isLoBits32()) + OS << "%lo("; + else if (MO.isHiBits64()) + OS << "%hh("; + else if (MO.isLoBits64()) + OS << "%hm("; + else + CloseParen = false; - if (unsigned int mod = offset % align) - { - offset += align - mod; - size += align - mod; + switch (MO.getType()) { + case MachineOperand::MO_VirtualRegister: + if (MO.getVRegValue()) { + OS << "%reg"; + OutputValue(OS, MO.getVRegValue()); + if (MO.hasAllocatedReg()) + OS << "=="; } - - offset = growUp? firstOffset + offset - : firstOffset - offset; - - incrementRegSpillsSize(size); - - return offset; + if (MO.hasAllocatedReg()) + OutputReg(OS, MO.getReg(), MRI); + break; + case MachineOperand::MO_CCRegister: + OS << "%ccreg"; + OutputValue(OS, MO.getVRegValue()); + if (MO.hasAllocatedReg()) { + OS << "=="; + OutputReg(OS, MO.getReg(), MRI); + } + break; + case MachineOperand::MO_MachineRegister: + OutputReg(OS, MO.getMachineRegNum(), MRI); + break; + case MachineOperand::MO_SignExtendedImmed: + OS << (long)MO.getImmedValue(); + break; + case MachineOperand::MO_UnextendedImmed: + OS << (long)MO.getImmedValue(); + break; + case MachineOperand::MO_PCRelativeDisp: { + const Value* opVal = MO.getVRegValue(); + bool isLabel = isa(opVal) || isa(opVal); + OS << "%disp(" << (isLabel? "label " : "addr-of-val "); + if (opVal->hasName()) + OS << opVal->getName(); + else + OS << (const void*) opVal; + OS << ")"; + break; + } + case MachineOperand::MO_MachineBasicBlock: + OS << "mbb<" + << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName() + << "," << (void*)MO.getMachineBasicBlock() << ">"; + break; + case MachineOperand::MO_FrameIndex: + OS << ""; + break; + case MachineOperand::MO_ConstantPoolIndex: + OS << ""; + break; + case MachineOperand::MO_GlobalAddress: + OS << "getName(); + if (MO.getOffset()) OS << "+" << MO.getOffset(); + OS << ">"; + break; + case MachineOperand::MO_ExternalSymbol: + OS << ""; + break; + default: + assert(0 && "Unrecognized operand type"); + } + + if (CloseParen) + OS << ")"; } -int -MachineCodeForMethod::allocateOptionalArg(const TargetMachine& target, - const Type* type) -{ - const MachineFrameInfo& frameInfo = target.getFrameInfo(); - - int size = MAXINT; - if (frameInfo.argsOnStackHaveFixedSize()) - size = frameInfo.getSizeOfEachArgOnStack(); - else - { - size = target.findOptimalStorageSize(type); - assert(0 && "UNTESTED CODE: Size per stack argument is not fixed on this architecture: use actual argument sizes for computing optional arg offsets"); - } - unsigned char align = target.DataLayout.getTypeAlignment(type); - - bool growUp; - int firstOffset = frameInfo.getFirstOptionalOutgoingArgOffset(*this, growUp); - - int offset = getCurrentOptionalArgsSize(); - if (! growUp) - offset += size; +void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { + unsigned StartOp = 0; + + // Specialize printing if op#0 is definition + if (getNumOperands() && getOperand(0).isDef() && !getOperand(0).isUse()) { + ::print(getOperand(0), OS, TM); + OS << " = "; + ++StartOp; // Don't print this operand again! + } + + // Must check if Target machine is not null because machine BB could not + // be attached to a Machine function yet + if (TM) + OS << TM->getInstrInfo()->getName(getOpcode()); - if (unsigned int mod = offset % align) - { - offset += align - mod; - size += align - mod; + for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) { + const MachineOperand& mop = getOperand(i); + if (i != StartOp) + OS << ","; + OS << " "; + ::print(mop, OS, TM); + + if (mop.isDef()) + if (mop.isUse()) + OS << ""; + else + OS << ""; + } + + // code for printing implicit references + if (getNumImplicitRefs()) { + OS << "\tImplicitRefs: "; + for (unsigned i = 0, e = getNumImplicitRefs(); i != e; ++i) { + OS << "\t"; + OutputValue(OS, getImplicitRef(i)); + if (getImplicitOp(i).isDef()) + if (getImplicitOp(i).isUse()) + OS << ""; + else + OS << ""; } + } - offset = growUp? firstOffset + offset - : firstOffset - offset; - - incrementCurrentOptionalArgsSize(size); - - return offset; + OS << "\n"; } -void -MachineCodeForMethod::resetOptionalArgs(const TargetMachine& target) -{ - currentOptionalArgsSize = 0; -} +namespace llvm { +std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) { + // If the instruction is embedded into a basic block, we can find the target + // info for the instruction. + if (const MachineBasicBlock *MBB = MI.getParent()) { + const MachineFunction *MF = MBB->getParent(); + if (MF) + MI.print(os, &MF->getTarget()); + else + MI.print(os, 0); + return os; + } -int -MachineCodeForMethod::pushTempValue(const TargetMachine& target, - unsigned int size) -{ - // Compute a power-of-2 alignment according to the possible sizes, - // but not greater than the alignment of the largest type we support - // (currently a double word -- see class TargetData). - unsigned char align = 1; - for (; align < size && align < target.DataLayout.getDoubleAlignment(); - align = 2*align) - ; + // Otherwise, print it out in the "raw" format without symbolic register names + // and such. + os << TargetInstrDescriptors[MI.getOpcode()].Name; - bool growUp; - int firstTmpOffset = target.getFrameInfo().getTmpAreaOffset(*this, growUp); - - int offset = currentTmpValuesSize; - if (! growUp) - offset += size; + for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) { + os << "\t" << MI.getOperand(i); + if (MI.getOperand(i).isDef()) + if (MI.getOperand(i).isUse()) + os << ""; + else + os << ""; + } - if (unsigned int mod = offset % align) - { - offset += align - mod; - size += align - mod; + // code for printing implicit references + unsigned NumOfImpRefs = MI.getNumImplicitRefs(); + if (NumOfImpRefs > 0) { + os << "\tImplicit: "; + for (unsigned z = 0; z < NumOfImpRefs; z++) { + OutputValue(os, MI.getImplicitRef(z)); + if (MI.getImplicitOp(z).isDef()) + if (MI.getImplicitOp(z).isUse()) + os << ""; + else + os << ""; + os << "\t"; } + } - offset = growUp ? firstTmpOffset + offset : firstTmpOffset - offset; - - currentTmpValuesSize += size; - return offset; + return os << "\n"; } -void -MachineCodeForMethod::popAllTempValues(const TargetMachine& target) -{ - currentTmpValuesSize = 0; -} +std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) { + if (MO.isHiBits32()) + OS << "%lm("; + else if (MO.isLoBits32()) + OS << "%lo("; + else if (MO.isHiBits64()) + OS << "%hh("; + else if (MO.isLoBits64()) + OS << "%hm("; + + switch (MO.getType()) { + case MachineOperand::MO_VirtualRegister: + if (MO.hasAllocatedReg()) + OutputReg(OS, MO.getReg()); -int -MachineCodeForMethod::getOffset(const Value* val) const -{ - std::hash_map::const_iterator pair = offsets.find(val); - return (pair == offsets.end())? INVALID_FRAME_OFFSET : pair->second; + if (MO.getVRegValue()) { + if (MO.hasAllocatedReg()) OS << "=="; + OS << "%vreg"; + OutputValue(OS, MO.getVRegValue()); + } + break; + case MachineOperand::MO_CCRegister: + OS << "%ccreg"; + OutputValue(OS, MO.getVRegValue()); + if (MO.hasAllocatedReg()) { + OS << "=="; + OutputReg(OS, MO.getReg()); + } + break; + case MachineOperand::MO_MachineRegister: + OutputReg(OS, MO.getMachineRegNum()); + break; + case MachineOperand::MO_SignExtendedImmed: + OS << (long)MO.getImmedValue(); + break; + case MachineOperand::MO_UnextendedImmed: + OS << (long)MO.getImmedValue(); + break; + case MachineOperand::MO_PCRelativeDisp: { + const Value* opVal = MO.getVRegValue(); + bool isLabel = isa(opVal) || isa(opVal); + OS << "%disp(" << (isLabel? "label " : "addr-of-val "); + if (opVal->hasName()) + OS << opVal->getName(); + else + OS << (const void*) opVal; + OS << ")"; + break; + } + case MachineOperand::MO_MachineBasicBlock: + OS << "getBasicBlock())->getName() + << "@" << (void*)MO.getMachineBasicBlock() << ">"; + break; + case MachineOperand::MO_FrameIndex: + OS << ""; + break; + case MachineOperand::MO_ConstantPoolIndex: + OS << ""; + break; + case MachineOperand::MO_GlobalAddress: + OS << "getName() << ">"; + break; + case MachineOperand::MO_ExternalSymbol: + OS << ""; + break; + default: + assert(0 && "Unrecognized operand type"); + break; + } + + if (MO.isHiBits32() || MO.isLoBits32() || MO.isHiBits64() || MO.isLoBits64()) + OS << ")"; + + return OS; } -void -MachineCodeForMethod::dump() const -{ - cerr << "\n" << method->getReturnType() - << " \"" << method->getName() << "\"\n"; - - for (Method::const_iterator BI = method->begin(); BI != method->end(); ++BI) - { - BasicBlock* bb = *BI; - cerr << "\n" - << (bb->hasName()? bb->getName() : "Label") - << " (" << bb << ")" << ":\n"; - - MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec(); - for (unsigned i=0; i < mvec.size(); i++) - cerr << "\t" << *mvec[i]; - } - cerr << "\nEnd method \"" << method->getName() << "\"\n\n"; }