X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FPHIElimination.cpp;h=9b5a115d93aa6971b7c1248eab01432519d0f9b1;hb=72623366c4b5116e36c9acb176f9704b4e3c9a3f;hp=ffbae2a7ff726c19147aa54a3ce5483202e90671;hpb=ed41f1bb1981a98eea63f00c5988cf62bbdd7c59;p=oota-llvm.git diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp index ffbae2a7ff7..9b5a115d93a 100644 --- a/lib/CodeGen/PHIElimination.cpp +++ b/lib/CodeGen/PHIElimination.cpp @@ -13,6 +13,7 @@ // //===----------------------------------------------------------------------===// +#define DEBUG_TYPE "phielim" #include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -20,26 +21,31 @@ #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/Statistic.h" -#include "llvm/Support/Visibility.h" +#include "llvm/Support/Compiler.h" #include #include using namespace llvm; +STATISTIC(NumAtomic, "Number of atomic phis lowered"); +//STATISTIC(NumSimple, "Number of simple phis lowered"); + namespace { - static Statistic<> NumAtomic("phielim", "Number of atomic phis lowered"); - static Statistic<> NumSimple("phielim", "Number of simple phis lowered"); - struct VISIBILITY_HIDDEN PNE : public MachineFunctionPass { + static char ID; // Pass identifcation, replacement for typeid + PNE() : MachineFunctionPass((intptr_t)&ID) {} + bool runOnMachineFunction(MachineFunction &Fn) { + analyzePHINodes(Fn); + bool Changed = false; // Eliminate PHI instructions by inserting copies into predecessor blocks. for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) Changed |= EliminatePHINodes(Fn, *I); + VRegPHIUseCount.clear(); return Changed; } @@ -54,15 +60,27 @@ namespace { /// bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); void LowerAtomicPHINode(MachineBasicBlock &MBB, - MachineBasicBlock::iterator AfterPHIsIt, - DenseMap &VUC); + MachineBasicBlock::iterator AfterPHIsIt); + + /// analyzePHINodes - Gather information about the PHI nodes in + /// here. In particular, we want to map the number of uses of a virtual + /// register which is used in a PHI node. We map that to the BB the + /// vreg is coming from. This is used later to determine when the vreg + /// is killed in the BB. + /// + void analyzePHINodes(const MachineFunction& Fn); + + typedef std::pair BBVRegPair; + typedef std::map VRegPHIUse; + + VRegPHIUse VRegPHIUseCount; }; + char PNE::ID = 0; RegisterPass X("phi-node-elimination", "Eliminate PHI nodes for register allocation"); } - const PassInfo *llvm::PHIEliminationID = X.getPassInfo(); /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in @@ -72,20 +90,6 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI) return false; // Quick exit for basic blocks without PHIs. - // VRegPHIUseCount - Keep track of the number of times each virtual register - // is used by PHI nodes in successors of this block. - DenseMap VRegPHIUseCount; - VRegPHIUseCount.grow(MF.getSSARegMap()->getLastVirtReg()); - - for (MachineBasicBlock::pred_iterator PI = MBB.pred_begin(), - E = MBB.pred_end(); PI != E; ++PI) - for (MachineBasicBlock::succ_iterator SI = (*PI)->succ_begin(), - E = (*PI)->succ_end(); SI != E; ++SI) - for (MachineBasicBlock::iterator BBI = (*SI)->begin(), E = (*SI)->end(); - BBI != E && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) - for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) - VRegPHIUseCount[BBI->getOperand(i).getReg()]++; - // Get an iterator to the first instruction after the last PHI node (this may // also be the end of the basic block). MachineBasicBlock::iterator AfterPHIsIt = MBB.begin(); @@ -93,9 +97,9 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI) ++AfterPHIsIt; // Skip over all of the PHI nodes... - while (MBB.front().getOpcode() == TargetInstrInfo::PHI) { - LowerAtomicPHINode(MBB, AfterPHIsIt, VRegPHIUseCount); - } + while (MBB.front().getOpcode() == TargetInstrInfo::PHI) + LowerAtomicPHINode(MBB, AfterPHIsIt); + return true; } @@ -103,9 +107,9 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { /// use of the specified register. static bool InstructionUsesRegister(MachineInstr *MI, unsigned SrcReg) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(0).isRegister() && - MI->getOperand(0).getReg() == SrcReg && - MI->getOperand(0).isUse()) + if (MI->getOperand(i).isRegister() && + MI->getOperand(i).getReg() == SrcReg && + MI->getOperand(i).isUse()) return true; return false; } @@ -115,14 +119,13 @@ static bool InstructionUsesRegister(MachineInstr *MI, unsigned SrcReg) { /// atomic execution of PHIs. This lowering method is always correct all of the /// time. void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB, - MachineBasicBlock::iterator AfterPHIsIt, - DenseMap &VRegPHIUseCount) { + MachineBasicBlock::iterator AfterPHIsIt) { // Unlink the PHI node from the basic block, but don't delete the PHI yet. MachineInstr *MPhi = MBB.remove(MBB.begin()); unsigned DestReg = MPhi->getOperand(0).getReg(); - // Create a new register for the incoming PHI arguments/ + // Create a new register for the incoming PHI arguments. MachineFunction &MF = *MBB.getParent(); const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg); unsigned IncomingReg = MF.getSSARegMap()->createVirtualRegister(RC); @@ -139,6 +142,9 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB, if (LV) { MachineInstr *PHICopy = prior(AfterPHIsIt); + // Increment use count of the newly created virtual register. + LV->getVarInfo(IncomingReg).NumUses++; + // Add information to LiveVariables to know that the incoming value is // killed. Note that because the value is defined in several places (once // each for each incoming block), the "def" block and instruction fields @@ -165,9 +171,10 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB, // Adjust the VRegPHIUseCount map to account for the removal of this PHI // node. - unsigned NumPreds = (MPhi->getNumOperands()-1)/2; for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) - VRegPHIUseCount[MPhi->getOperand(i).getReg()] -= NumPreds; + --VRegPHIUseCount[BBVRegPair( + MPhi->getOperand(i + 1).getMachineBasicBlock(), + MPhi->getOperand(i).getReg())]; // Now loop over all of the incoming arguments, changing them to copy into // the IncomingReg register in the corresponding predecessor basic block. @@ -219,7 +226,7 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB, // // Is it used by any PHI instructions in this block? - bool ValueIsLive = VRegPHIUseCount[SrcReg] != 0; + bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0; std::vector OpSuccBlocks; @@ -317,3 +324,19 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB, delete MPhi; ++NumAtomic; } + +/// analyzePHINodes - Gather information about the PHI nodes in here. In +/// particular, we want to map the number of uses of a virtual register which is +/// used in a PHI node. We map that to the BB the vreg is coming from. This is +/// used later to determine when the vreg is killed in the BB. +/// +void PNE::analyzePHINodes(const MachineFunction& Fn) { + for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end(); + I != E; ++I) + for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); + BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) + for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) + ++VRegPHIUseCount[BBVRegPair( + BBI->getOperand(i + 1).getMachineBasicBlock(), + BBI->getOperand(i).getReg())]; +}