X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FPrologEpilogInserter.cpp;h=1fec4c9f5629053f7076cbc40fc800683af018e8;hb=e6be34a53ecbe8c2ff9f0793b13d847e94c0de91;hp=18b2d7d963f11f5a32ab42a72f3ef80f62203b80;hpb=3e15bf33e024b9df9e89351a165acfdb1dde51ed;p=oota-llvm.git diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index 18b2d7d963f..1fec4c9f562 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -20,9 +20,11 @@ #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/RegisterScavenging.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/MRegisterInfo.h" +#include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Support/Compiler.h" @@ -32,7 +34,7 @@ using namespace llvm; namespace { struct VISIBILITY_HIDDEN PEI : public MachineFunctionPass { - static const char ID; + static char ID; PEI() : MachineFunctionPass((intptr_t)&ID) {} const char *getPassName() const { @@ -43,18 +45,17 @@ namespace { /// frame indexes with appropriate references. /// bool runOnMachineFunction(MachineFunction &Fn) { - const MRegisterInfo *MRI = Fn.getTarget().getRegisterInfo(); - RS = MRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL; + const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo(); + RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL; // Get MachineModuleInfo so that we can track the construction of the // frame. - if (MachineModuleInfo *MMI = getAnalysisToUpdate()) { + if (MachineModuleInfo *MMI = getAnalysisToUpdate()) Fn.getFrameInfo()->setMachineModuleInfo(MMI); - } // Allow the target machine to make some adjustments to the function // e.g. UsedPhysRegs before calculateCalleeSavedRegisters. - MRI->processFunctionBeforeCalleeSavedScan(Fn, RS); + TRI->processFunctionBeforeCalleeSavedScan(Fn, RS); // Scan the function for modified callee saved registers and insert spill // code for any callee saved registers that are modified. Also calculate @@ -101,7 +102,7 @@ namespace { void replaceFrameIndices(MachineFunction &Fn); void insertPrologEpilogCode(MachineFunction &Fn); }; - const char PEI::ID = 0; + char PEI::ID = 0; } @@ -117,11 +118,11 @@ FunctionPass *llvm::createPrologEpilogCodeInserter() { return new PEI(); } /// instructions. /// void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) { - const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); + const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); const TargetFrameInfo *TFI = Fn.getTarget().getFrameInfo(); // Get the callee saved register list... - const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(); + const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn); // Get the function call frame set-up and tear-down instruction opcode int FrameSetupOpcode = RegInfo->getCallFrameSetupOpcode(); @@ -147,7 +148,7 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) { I->getOpcode() == FrameDestroyOpcode) { assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo" " instructions should have a single immediate argument!"); - unsigned Size = I->getOperand(0).getImmedValue(); + unsigned Size = I->getOperand(0).getImm(); if (Size > MaxCallFrameSize) MaxCallFrameSize = Size; HasCalls = true; FrameSDOps.push_back(I); @@ -170,17 +171,17 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) { // function, thus needing to be saved and restored in the prolog/epilog. // const TargetRegisterClass* const *CSRegClasses = - RegInfo->getCalleeSavedRegClasses(); + RegInfo->getCalleeSavedRegClasses(&Fn); std::vector CSI; for (unsigned i = 0; CSRegs[i]; ++i) { unsigned Reg = CSRegs[i]; - if (Fn.isPhysRegUsed(Reg)) { + if (Fn.getRegInfo().isPhysRegUsed(Reg)) { // If the reg is modified, save it! CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i])); } else { for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); *AliasSet; ++AliasSet) { // Check alias registers too. - if (Fn.isPhysRegUsed(*AliasSet)) { + if (Fn.getRegInfo().isPhysRegUsed(*AliasSet)) { CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i])); break; } @@ -241,35 +242,35 @@ void PEI::saveCalleeSavedRegisters(MachineFunction &Fn) { if (CSI.empty()) return; - const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); + const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); // Now that we have a stack slot for each register to be saved, insert spill // code into the entry block. MachineBasicBlock *MBB = Fn.begin(); MachineBasicBlock::iterator I = MBB->begin(); - if (!RegInfo->spillCalleeSavedRegisters(*MBB, I, CSI)) { + + if (!TII.spillCalleeSavedRegisters(*MBB, I, CSI)) { for (unsigned i = 0, e = CSI.size(); i != e; ++i) { // Add the callee-saved register as live-in. It's killed at the spill. MBB->addLiveIn(CSI[i].getReg()); // Insert the spill to the stack frame. - RegInfo->storeRegToStackSlot(*MBB, I, CSI[i].getReg(), + TII.storeRegToStackSlot(*MBB, I, CSI[i].getReg(), true, CSI[i].getFrameIdx(), CSI[i].getRegClass()); } } // Add code to restore the callee-save registers in each exiting block. - const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); for (MachineFunction::iterator FI = Fn.begin(), E = Fn.end(); FI != E; ++FI) // If last instruction is a return instruction, add an epilogue. - if (!FI->empty() && TII.isReturn(FI->back().getOpcode())) { + if (!FI->empty() && FI->back().getDesc().isReturn()) { MBB = FI; I = MBB->end(); --I; // Skip over all terminator instructions, which are part of the return // sequence. MachineBasicBlock::iterator I2 = I; - while (I2 != MBB->begin() && TII.isTerminatorInstr((--I2)->getOpcode())) + while (I2 != MBB->begin() && (--I2)->getDesc().isTerminator()) I = I2; bool AtStart = I == MBB->begin(); @@ -279,9 +280,9 @@ void PEI::saveCalleeSavedRegisters(MachineFunction &Fn) { // Restore all registers immediately before the return and any terminators // that preceed it. - if (!RegInfo->restoreCalleeSavedRegisters(*MBB, I, CSI)) { + if (!TII.restoreCalleeSavedRegisters(*MBB, I, CSI)) { for (unsigned i = 0, e = CSI.size(); i != e; ++i) { - RegInfo->loadRegFromStackSlot(*MBB, I, CSI[i].getReg(), + TII.loadRegFromStackSlot(*MBB, I, CSI[i].getReg(), CSI[i].getFrameIdx(), CSI[i].getRegClass()); assert(I != MBB->begin() && @@ -376,7 +377,7 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { // Make sure the special register scavenging spill slot is closest to the // frame pointer if a frame pointer is required. - const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); + const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); if (RS && RegInfo->hasFP(Fn)) { int SFI = RS->getScavengingFrameIndex(); if (SFI >= 0) { @@ -428,7 +429,7 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { // Make sure the special register scavenging spill slot is closest to the // stack pointer. - if (RS) { + if (RS && !RegInfo->hasFP(Fn)) { int SFI = RS->getScavengingFrameIndex(); if (SFI >= 0) { // If stack grows down, we need to add size of find the lowest @@ -437,6 +438,9 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { Offset += FFI->getObjectSize(SFI); unsigned Align = FFI->getObjectAlignment(SFI); + // If the alignment of this object is greater than that of the + // stack, then increase the stack alignment to match. + MaxAlign = std::max(MaxAlign, Align); // Adjust to alignment boundary Offset = (Offset+Align-1)/Align*Align; @@ -483,10 +487,9 @@ void PEI::insertPrologEpilogCode(MachineFunction &Fn) { Fn.getTarget().getRegisterInfo()->emitPrologue(Fn); // Add epilogue to restore the callee-save registers in each exiting block - const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) { // If last instruction is a return instruction, add an epilogue - if (!I->empty() && TII.isReturn(I->back().getOpcode())) + if (!I->empty() && I->back().getDesc().isReturn()) Fn.getTarget().getRegisterInfo()->emitEpilogue(Fn, *I); } } @@ -500,12 +503,12 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) { const TargetMachine &TM = Fn.getTarget(); assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!"); - const MRegisterInfo &MRI = *TM.getRegisterInfo(); + const TargetRegisterInfo &TRI = *TM.getRegisterInfo(); const TargetFrameInfo *TFI = TM.getFrameInfo(); bool StackGrowsDown = TFI->getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown; - int FrameSetupOpcode = MRI.getCallFrameSetupOpcode(); - int FrameDestroyOpcode = MRI.getCallFrameDestroyOpcode(); + int FrameSetupOpcode = TRI.getCallFrameSetupOpcode(); + int FrameDestroyOpcode = TRI.getCallFrameDestroyOpcode(); for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) { int SPAdj = 0; // SP offset due to call frame setup / destroy. @@ -513,26 +516,29 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) { for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { MachineInstr *MI = I; - // Remember how much SP has been adjustment to create the call frame. if (I->getOpcode() == FrameSetupOpcode || I->getOpcode() == FrameDestroyOpcode) { - int Size = I->getOperand(0).getImmedValue(); + // Remember how much SP has been adjustment to create the call frame. + int Size = I->getOperand(0).getImm(); if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) || (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode)) Size = -Size; SPAdj += Size; MachineBasicBlock::iterator PrevI = prior(I); - MRI.eliminateCallFramePseudoInstr(Fn, *BB, I); + TRI.eliminateCallFramePseudoInstr(Fn, *BB, I); // Visit the instructions created by eliminateCallFramePseudoInstr(). I = next(PrevI); MI = NULL; - } else { + } else if (I->getOpcode() == TargetInstrInfo::DECLARE) + // Ignore it. + I++; + else { I++; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) if (MI->getOperand(i).isFrameIndex()) { // If this instruction has a FrameIndex operand, we need to use that // target machine register info object to eliminate it. - MRI.eliminateFrameIndex(MI, SPAdj, RS); + TRI.eliminateFrameIndex(MI, SPAdj, RS); // Revisit the instruction in full. Some instructions (e.g. inline // asm instructions) can have multiple frame indices.