X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FRegAllocLocal.cpp;h=59831f0b707aef295b27960b9dfe9d3648fead81;hb=73b43b9b549a75fb0015c825df68abd95705a67c;hp=12064a957c174eea6062307b0300e758fde71222;hpb=6f0d024a534af18d9e60b3ea757376cd8a3a980e;p=oota-llvm.git

diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 12064a957c1..59831f0b707 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -31,17 +31,17 @@
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/STLExtras.h"
 #include <algorithm>
+#include <map>
 using namespace llvm;
 
 STATISTIC(NumStores, "Number of stores added");
 STATISTIC(NumLoads , "Number of loads added");
 
-namespace {
-  static RegisterRegAlloc
-    localRegAlloc("local", "  local register allocator",
-                  createLocalRegisterAllocator);
-
+static RegisterRegAlloc
+  localRegAlloc("local", "  local register allocator",
+                createLocalRegisterAllocator);
 
+namespace {
   class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
   public:
     static char ID;
@@ -303,17 +303,11 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
     const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
     int FrameIndex = getStackSpaceFor(VirtReg, RC);
     DOUT << " to stack slot #" << FrameIndex;
-    TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIndex, RC);
-
     // If the instruction reads the register that's spilled, (e.g. this can
     // happen if it is a move to a physical register), then the spill
     // instruction is not a kill.
-    if (I != MBB.end() && I->findRegisterUseOperandIdx(PhysReg) != -1) {
-      MachineBasicBlock::iterator StoreMI = prior(I);
-      int Idx = StoreMI->findRegisterUseOperandIdx(PhysReg, true);
-      assert(Idx != -1 && "Unrecognized spill instruction!");
-      StoreMI->getOperand(Idx).setIsKill(false);
-    }
+    bool isKill = !(I != MBB.end() && I->readsRegister(PhysReg));
+    TII->storeRegToStackSlot(MBB, I, PhysReg, isKill, FrameIndex, RC);
     ++NumStores;   // Update statistics
   }
 
@@ -373,7 +367,7 @@ bool RALocal::isPhysRegAvailable(unsigned PhysReg) const {
   // not free!
   for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
        *AliasSet; ++AliasSet)
-    if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
+    if (PhysRegsUsed[*AliasSet] >= 0) // Aliased register in use?
       return false;                    // Can't use this reg then.
   return true;
 }
@@ -485,8 +479,9 @@ MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
   // If the virtual register is already available, just update the instruction
   // and return.
   if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
-    MarkPhysRegRecentlyUsed(PR);          // Already have this value available!
+    MarkPhysRegRecentlyUsed(PR);       // Already have this value available!
     MI->getOperand(OpNum).setReg(PR);  // Assign the input register
+    getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
     return MI;
   }
 
@@ -554,10 +549,10 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
 
   // If this is the first basic block in the machine function, add live-in
   // registers as active.
-  if (&MBB == &*MF->begin()) {
-    for (MachineRegisterInfo::livein_iterator I=MF->getRegInfo().livein_begin(),
-         E = MF->getRegInfo().livein_end(); I != E; ++I) {
-      unsigned Reg = I->first;
+  if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
+    for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
+         E = MBB.livein_end(); I != E; ++I) {
+      unsigned Reg = *I;
       MF->getRegInfo().setPhysRegUsed(Reg);
       PhysRegsUsed[Reg] = 0;            // It is free and reserved now
       AddToPhysRegsUseOrder(Reg); 
@@ -733,6 +728,8 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
         MF->getRegInfo().setPhysRegUsed(DestPhysReg);
         markVirtRegModified(DestVirtReg);
         getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
+        DOUT << "  Assigning " << TRI->getName(DestPhysReg)
+             << " to %reg" << DestVirtReg << "\n";
         MI->getOperand(i).setReg(DestPhysReg);  // Assign the output register
       }
     }
@@ -780,11 +777,12 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
 
   // Spill all physical registers holding virtual registers now.
   for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i)
-    if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
+    if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) {
       if (unsigned VirtReg = PhysRegsUsed[i])
         spillVirtReg(MBB, MI, VirtReg, i);
       else
         removePhysReg(i);
+    }
 
 #if 0
   // This checking code is very expensive.