X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FRegAllocLocal.cpp;h=59831f0b707aef295b27960b9dfe9d3648fead81;hb=990f032907ae171cc3d465a694e8e6d2a6545f57;hp=8f1cce6f4fb96dcdcd36ef511fa9de1ff3401377;hpb=9af7090392efa7bf1b7eae274b9231518af8303b;p=oota-llvm.git

diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 8f1cce6f4fb..59831f0b707 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -31,17 +31,17 @@
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/STLExtras.h"
 #include <algorithm>
+#include <map>
 using namespace llvm;
 
 STATISTIC(NumStores, "Number of stores added");
 STATISTIC(NumLoads , "Number of loads added");
 
-namespace {
-  static RegisterRegAlloc
-    localRegAlloc("local", "  local register allocator",
-                  createLocalRegisterAllocator);
-
+static RegisterRegAlloc
+  localRegAlloc("local", "  local register allocator",
+                createLocalRegisterAllocator);
 
+namespace {
   class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
   public:
     static char ID;
@@ -306,8 +306,7 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
     // If the instruction reads the register that's spilled, (e.g. this can
     // happen if it is a move to a physical register), then the spill
     // instruction is not a kill.
-    bool isKill = !(I != MBB.end() &&
-                    I->findRegisterUseOperandIdx(PhysReg) != -1);
+    bool isKill = !(I != MBB.end() && I->readsRegister(PhysReg));
     TII->storeRegToStackSlot(MBB, I, PhysReg, isKill, FrameIndex, RC);
     ++NumStores;   // Update statistics
   }
@@ -368,7 +367,7 @@ bool RALocal::isPhysRegAvailable(unsigned PhysReg) const {
   // not free!
   for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
        *AliasSet; ++AliasSet)
-    if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
+    if (PhysRegsUsed[*AliasSet] >= 0) // Aliased register in use?
       return false;                    // Can't use this reg then.
   return true;
 }
@@ -480,8 +479,9 @@ MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
   // If the virtual register is already available, just update the instruction
   // and return.
   if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
-    MarkPhysRegRecentlyUsed(PR);          // Already have this value available!
+    MarkPhysRegRecentlyUsed(PR);       // Already have this value available!
     MI->getOperand(OpNum).setReg(PR);  // Assign the input register
+    getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
     return MI;
   }
 
@@ -549,10 +549,10 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
 
   // If this is the first basic block in the machine function, add live-in
   // registers as active.
-  if (&MBB == &*MF->begin()) {
-    for (MachineRegisterInfo::livein_iterator I=MF->getRegInfo().livein_begin(),
-         E = MF->getRegInfo().livein_end(); I != E; ++I) {
-      unsigned Reg = I->first;
+  if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
+    for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
+         E = MBB.livein_end(); I != E; ++I) {
+      unsigned Reg = *I;
       MF->getRegInfo().setPhysRegUsed(Reg);
       PhysRegsUsed[Reg] = 0;            // It is free and reserved now
       AddToPhysRegsUseOrder(Reg);