X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FRegAllocLocal.cpp;h=d3c3277cbbf35cbcc1fc0b63b6a4d1ad789dee18;hb=ef9531efedd2233269f670227fb0e6aae7480d53;hp=206f798e76a0323f3d4981ab9eeb33960f40ac17;hpb=580f9be7ff6ddbdf6914fc9243ab21fa21ffd34e;p=oota-llvm.git diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index 206f798e76a..d3c3277cbbf 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -1,48 +1,66 @@ //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===// // +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// // This register allocator allocates registers to a basic block at a time, // attempting to keep values in registers and reusing registers as appropriate. // //===----------------------------------------------------------------------===// +#define DEBUG_TYPE "regalloc" +#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/SSARegMap.h" -#include "llvm/CodeGen/FunctionFrameInfo.h" -#include "llvm/Target/MachineInstrInfo.h" +#include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/LiveVariables.h" +#include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" -#include "Support/Statistic.h" -#include "Support/CommandLine.h" -#include -#include +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Debug.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/Statistic.h" +#include +using namespace llvm; namespace { - Statistic<> NumSpilled ("ra-local", "Number of registers spilled"); - Statistic<> NumReloaded("ra-local", "Number of registers reloaded"); - cl::opt DisableKill("no-kill", cl::Hidden, - cl::desc("Disable register kill in local-ra")); - + Statistic<> NumStores("ra-local", "Number of stores added"); + Statistic<> NumLoads ("ra-local", "Number of loads added"); + Statistic<> NumFolded("ra-local", "Number of loads/stores folded into " + "instructions"); class RA : public MachineFunctionPass { const TargetMachine *TM; MachineFunction *MF; const MRegisterInfo *RegInfo; + LiveVariables *LV; + bool *PhysRegsEverUsed; - // StackSlotForVirtReg - Maps SSA Regs => frame index where these values are - // spilled + // StackSlotForVirtReg - Maps virtual regs to the frame index where these + // values are spilled. std::map StackSlotForVirtReg; // Virt2PhysRegMap - This map contains entries for each virtual register // that is currently available in a physical register. + DenseMap Virt2PhysRegMap; + + unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) { + return Virt2PhysRegMap[VirtReg]; + } + + // PhysRegsUsed - This array is effectively a map, containing entries for + // each physical register that currently has a value (ie, it is in + // Virt2PhysRegMap). The value mapped to is the virtual register + // corresponding to the physical register (the inverse of the + // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned + // because it is used by a future instruction. If the entry for a physical + // register is -1, then the physical register is "not in the map". // - std::map Virt2PhysRegMap; - - // PhysRegsUsed - This map contains entries for each physical register that - // currently has a value (ie, it is in Virt2PhysRegMap). The value mapped - // to is the virtual register corresponding to the physical register (the - // inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this - // register is pinned because it is used by a future instruction. - // - std::map PhysRegsUsed; + std::vector PhysRegsUsed; // PhysRegsUseOrder - This contains a list of the physical registers that // currently have a virtual register value in them. This list provides an @@ -54,26 +72,40 @@ namespace { // std::vector PhysRegsUseOrder; - // LastUserOf map - This multimap contains the set of registers that each - // key instruction is the last user of. If an instruction has an entry in - // this map, that means that the specified operands are killed after the - // instruction is executed, thus they don't need to be spilled into memory + // VirtRegModified - This bitset contains information about which virtual + // registers need to be spilled back to memory when their registers are + // scavenged. If a virtual register has simply been rematerialized, there + // is no reason to spill it to memory when we need the register back. // - std::multimap LastUserOf; + std::vector VirtRegModified; + + void markVirtRegModified(unsigned Reg, bool Val = true) { + assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!"); + Reg -= MRegisterInfo::FirstVirtualRegister; + if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1); + VirtRegModified[Reg] = Val; + } + + bool isVirtRegModified(unsigned Reg) const { + assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!"); + assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size() + && "Illegal virtual register!"); + return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister]; + } void MarkPhysRegRecentlyUsed(unsigned Reg) { - assert(!PhysRegsUseOrder.empty() && "No registers used!"); - if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used + if(PhysRegsUseOrder.empty() || + PhysRegsUseOrder.back() == Reg) return; // Already most recently used for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i) - if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) { - unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle - PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1); - // Add it to the end of the list - PhysRegsUseOrder.push_back(RegMatch); - if (RegMatch == Reg) - return; // Found an exact match, exit early - } + if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) { + unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle + PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1); + // Add it to the end of the list + PhysRegsUseOrder.push_back(RegMatch); + if (RegMatch == Reg) + return; // Found an exact match, exit early + } } public: @@ -81,6 +113,13 @@ namespace { return "Local Register Allocator"; } + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequired(); + AU.addRequiredID(PHIEliminationID); + AU.addRequiredID(TwoAddressInstructionPassID); + MachineFunctionPass::getAnalysisUsage(AU); + } + private: /// runOnMachineFunction - Register allocate the whole function bool runOnMachineFunction(MachineFunction &Fn); @@ -88,19 +127,6 @@ namespace { /// AllocateBasicBlock - Register allocate the specified basic block. void AllocateBasicBlock(MachineBasicBlock &MBB); - /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions - /// in predecessor basic blocks. - void EliminatePHINodes(MachineBasicBlock &MBB); - - /// CalculateLastUseOfVReg - Calculate an approximation of the killing - /// uses for the virtual registers in the function. Here we try to capture - /// registers that are defined and only used within the same basic block. - /// Because we don't have use-def chains yet, we have to do this the hard - /// way. - /// - void CalculateLastUseOfVReg(MachineBasicBlock &MBB, - std::map &LastUseOfVReg) const; - /// areRegsEqual - This method returns true if the specified registers are /// related to each other. To do this, it checks to see if they are equal @@ -108,86 +134,101 @@ namespace { /// bool areRegsEqual(unsigned R1, unsigned R2) const { if (R1 == R2) return true; - if (const unsigned *AliasSet = RegInfo->getAliasSet(R2)) - for (unsigned i = 0; AliasSet[i]; ++i) - if (AliasSet[i] == R1) return true; + for (const unsigned *AliasSet = RegInfo->getAliasSet(R2); + *AliasSet; ++AliasSet) { + if (*AliasSet == R1) return true; + } return false; } /// getStackSpaceFor - This returns the frame index of the specified virtual - /// register on the stack, allocating space if neccesary. + /// register on the stack, allocating space if necessary. int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC); + /// removePhysReg - This method marks the specified physical register as no + /// longer being in use. + /// void removePhysReg(unsigned PhysReg); /// spillVirtReg - This method spills the value specified by PhysReg into /// the virtual register slot specified by VirtReg. It then updates the RA /// data structures to indicate the fact that PhysReg is now available. /// - void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, + void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned VirtReg, unsigned PhysReg); /// spillPhysReg - This method spills the specified physical register into - /// the virtual register slot associated with it. - // - void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, - unsigned PhysReg) { - std::map::iterator PI = PhysRegsUsed.find(PhysReg); - if (PI != PhysRegsUsed.end()) { // Only spill it if it's used! - spillVirtReg(MBB, I, PI->second, PhysReg); - } else if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg)) { - // If the selected register aliases any other registers, we must make - // sure that one of the aliases isn't alive... - for (unsigned i = 0; AliasSet[i]; ++i) { - PI = PhysRegsUsed.find(AliasSet[i]); - if (PI != PhysRegsUsed.end()) // Spill aliased register... - spillVirtReg(MBB, I, PI->second, AliasSet[i]); - } - } - } + /// the virtual register slot associated with it. If OnlyVirtRegs is set to + /// true, then the request is ignored if the physical register does not + /// contain a virtual register. + /// + void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I, + unsigned PhysReg, bool OnlyVirtRegs = false); - void AssignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg); + /// assignVirtToPhysReg - This method updates local state so that we know + /// that PhysReg is the proper container for VirtReg now. The physical + /// register must not be used for anything else when this is called. + /// + void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg); + + /// liberatePhysReg - Make sure the specified physical register is available + /// for use. If there is currently a value in it, it is either moved out of + /// the way or spilled to memory. + /// + void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, + unsigned PhysReg); /// isPhysRegAvailable - Return true if the specified physical register is /// free and available for use. This also includes checking to see if /// aliased registers are all free... /// bool isPhysRegAvailable(unsigned PhysReg) const; - - /// getFreeReg - Find a physical register to hold the specified virtual + + /// getFreeReg - Look to see if there is a free register available in the + /// specified register class. If not, return 0. + /// + unsigned getFreeReg(const TargetRegisterClass *RC); + + /// getReg - Find a physical register to hold the specified virtual /// register. If all compatible physical registers are used, this method /// spills the last used virtual register to the stack, and uses that /// register. /// - unsigned getFreeReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator &I, - unsigned virtualReg); - - /// reloadVirtReg - This method loads the specified virtual register into a - /// physical register, returning the physical register chosen. This updates - /// the regalloc data structures to reflect the fact that the virtual reg is - /// now alive in a physical register, and the previous one isn't. + unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI, + unsigned VirtReg); + + /// reloadVirtReg - This method transforms the specified specified virtual + /// register use to refer to a physical register. This method may do this + /// in one of several ways: if the register is available in a physical + /// register already, it uses that physical register. If the value is not + /// in a physical register, and if there are physical registers available, + /// it loads it into a register. If register pressure is high, and it is + /// possible, it tries to fold the load of the virtual register into the + /// instruction itself. It avoids doing this if register pressure is low to + /// improve the chance that subsequent instructions can use the reloaded + /// value. This method returns the modified instruction. /// - unsigned reloadVirtReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator &I, unsigned VirtReg); + MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, + unsigned OpNum); + + + void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, + unsigned PhysReg); }; } - -/// getStackSpaceFor - This allocates space for the specified virtual -/// register to be held on the stack. -int RA::getStackSpaceFor(unsigned VirtReg, - const TargetRegisterClass *RC) { - // Find the location VirtReg would belong... - std::map::iterator I = - StackSlotForVirtReg.lower_bound(VirtReg); +/// getStackSpaceFor - This allocates space for the specified virtual register +/// to be held on the stack. +int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) { + // Find the location Reg would belong... + std::map::iterator I =StackSlotForVirtReg.lower_bound(VirtReg); if (I != StackSlotForVirtReg.end() && I->first == VirtReg) return I->second; // Already has space allocated? // Allocate a new stack object for this spill location... - int FrameIdx = - MF->getFrameInfo()->CreateStackObject(RC->getSize(), RC->getAlignment()); + int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(), + RC->getAlignment()); // Assign the slot... StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx)); @@ -195,83 +236,142 @@ int RA::getStackSpaceFor(unsigned VirtReg, } -/// removePhysReg - This method marks the specified physical register as no +/// removePhysReg - This method marks the specified physical register as no /// longer being in use. /// void RA::removePhysReg(unsigned PhysReg) { - PhysRegsUsed.erase(PhysReg); // PhyReg no longer used + PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used std::vector::iterator It = std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg); - assert(It != PhysRegsUseOrder.end() && - "Spilled a physical register, but it was not in use list!"); - PhysRegsUseOrder.erase(It); + if (It != PhysRegsUseOrder.end()) + PhysRegsUseOrder.erase(It); } + /// spillVirtReg - This method spills the value specified by PhysReg into the /// virtual register slot specified by VirtReg. It then updates the RA data /// structures to indicate the fact that PhysReg is now available. /// -void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, +void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned VirtReg, unsigned PhysReg) { - // If this is just a marker register, we don't need to spill it. - if (VirtReg != 0) { - const TargetRegisterClass *RegClass = - MF->getSSARegMap()->getRegClass(VirtReg); - int FrameIndex = getStackSpaceFor(VirtReg, RegClass); - - // Add move instruction(s) - RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RegClass); - ++NumSpilled; // Update statistics - Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available + assert(VirtReg && "Spilling a physical register is illegal!" + " Must not have appropriate kill for the register or use exists beyond" + " the intended one."); + DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg); + std::cerr << " containing %reg" << VirtReg; + if (!isVirtRegModified(VirtReg)) + std::cerr << " which has not been modified, so no store necessary!"); + + // Otherwise, there is a virtual register corresponding to this physical + // register. We only need to spill it into its stack slot if it has been + // modified. + if (isVirtRegModified(VirtReg)) { + const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); + int FrameIndex = getStackSpaceFor(VirtReg, RC); + DEBUG(std::cerr << " to stack slot #" << FrameIndex); + RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex); + ++NumStores; // Update statistics } + getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available + + DEBUG(std::cerr << "\n"); removePhysReg(PhysReg); } +/// spillPhysReg - This method spills the specified physical register into the +/// virtual register slot associated with it. If OnlyVirtRegs is set to true, +/// then the request is ignored if the physical register does not contain a +/// virtual register. +/// +void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I, + unsigned PhysReg, bool OnlyVirtRegs) { + if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used! + if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs) + spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg); + } else { + // If the selected register aliases any other registers, we must make + // sure that one of the aliases isn't alive... + for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg); + *AliasSet; ++AliasSet) + if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register... + if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs) + spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet); + } +} + + +/// assignVirtToPhysReg - This method updates local state so that we know +/// that PhysReg is the proper container for VirtReg now. The physical +/// register must not be used for anything else when this is called. +/// +void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) { + assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!"); + // Update information to note the fact that this register was just used, and + // it holds VirtReg. + PhysRegsUsed[PhysReg] = VirtReg; + getVirt2PhysRegMapSlot(VirtReg) = PhysReg; + PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg +} + + /// isPhysRegAvailable - Return true if the specified physical register is free /// and available for use. This also includes checking to see if aliased /// registers are all free... /// bool RA::isPhysRegAvailable(unsigned PhysReg) const { - if (PhysRegsUsed.count(PhysReg)) return false; + if (PhysRegsUsed[PhysReg] != -1) return false; // If the selected register aliases any other allocated registers, it is // not free! - if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg)) - for (unsigned i = 0; AliasSet[i]; ++i) - if (PhysRegsUsed.count(AliasSet[i])) // Aliased register in use? - return false; // Can't use this reg then. + for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg); + *AliasSet; ++AliasSet) + if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use? + return false; // Can't use this reg then. return true; } - -/// getFreeReg - Find a physical register to hold the specified virtual -/// register. If all compatible physical registers are used, this method spills -/// the last used virtual register to the stack, and uses that register. +/// getFreeReg - Look to see if there is a free register available in the +/// specified register class. If not, return 0. /// -unsigned RA::getFreeReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, - unsigned VirtReg) { - const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); - +unsigned RA::getFreeReg(const TargetRegisterClass *RC) { // Get iterators defining the range of registers that are valid to allocate in // this class, which also specifies the preferred allocation order. TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF); TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF); - // First check to see if we have a free register of the requested type... - unsigned PhysReg = 0; - for (; RI != RE; ++RI) { - unsigned R = *RI; - if (isPhysRegAvailable(R)) { // Is reg unused? - // Found an unused register! - PhysReg = R; - assert(PhysReg != 0 && "Cannot use register!"); - break; + for (; RI != RE; ++RI) + if (isPhysRegAvailable(*RI)) { // Is reg unused? + assert(*RI != 0 && "Cannot use register!"); + return *RI; // Found an unused register! } - } + return 0; +} + + +/// liberatePhysReg - Make sure the specified physical register is available for +/// use. If there is currently a value in it, it is either moved out of the way +/// or spilled to memory. +/// +void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, + unsigned PhysReg) { + spillPhysReg(MBB, I, PhysReg); +} + + +/// getReg - Find a physical register to hold the specified virtual +/// register. If all compatible physical registers are used, this method spills +/// the last used virtual register to the stack, and uses that register. +/// +unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I, + unsigned VirtReg) { + const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); + + // First check to see if we have a free register of the requested type... + unsigned PhysReg = getFreeReg(RC); // If we didn't find an unused register, scavenge one now! if (PhysReg == 0) { @@ -283,21 +383,30 @@ unsigned RA::getFreeReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, for (unsigned i = 0; PhysReg == 0; ++i) { assert(i != PhysRegsUseOrder.size() && "Couldn't find a register of the appropriate class!"); - + unsigned R = PhysRegsUseOrder[i]; - // If the current register is compatible, use it. - if (RegInfo->getRegClass(R) == RC) { - PhysReg = R; - break; - } else { - // If one of the registers aliased to the current register is - // compatible, use it. - if (const unsigned *AliasSet = RegInfo->getAliasSet(R)) - for (unsigned a = 0; AliasSet[a]; ++a) - if (RegInfo->getRegClass(AliasSet[a]) == RC) { - PhysReg = AliasSet[a]; // Take an aliased register - break; - } + + // We can only use this register if it holds a virtual register (ie, it + // can be spilled). Do not use it if it is an explicitly allocated + // physical register! + assert(PhysRegsUsed[R] != -1 && + "PhysReg in PhysRegsUseOrder, but is not allocated?"); + if (PhysRegsUsed[R]) { + // If the current register is compatible, use it. + if (RC->contains(R)) { + PhysReg = R; + break; + } else { + // If one of the registers aliased to the current register is + // compatible, use it. + for (const unsigned *AliasSet = RegInfo->getAliasSet(R); + *AliasSet; ++AliasSet) { + if (RC->contains(*AliasSet)) { + PhysReg = *AliasSet; // Take an aliased register + break; + } + } + } } } @@ -309,273 +418,236 @@ unsigned RA::getFreeReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, } // Now that we know which register we need to assign this to, do it now! - AssignVirtToPhysReg(VirtReg, PhysReg); + assignVirtToPhysReg(VirtReg, PhysReg); return PhysReg; } -void RA::AssignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) { - assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() && - "Phys reg already assigned!"); - // Update information to note the fact that this register was just used, and - // it holds VirtReg. - PhysRegsUsed[PhysReg] = VirtReg; - Virt2PhysRegMap[VirtReg] = PhysReg; - PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg -} - - -/// reloadVirtReg - This method loads the specified virtual register into a -/// physical register, returning the physical register chosen. This updates the -/// regalloc data structures to reflect the fact that the virtual reg is now -/// alive in a physical register, and the previous one isn't. +/// reloadVirtReg - This method transforms the specified specified virtual +/// register use to refer to a physical register. This method may do this in +/// one of several ways: if the register is available in a physical register +/// already, it uses that physical register. If the value is not in a physical +/// register, and if there are physical registers available, it loads it into a +/// register. If register pressure is high, and it is possible, it tries to +/// fold the load of the virtual register into the instruction itself. It +/// avoids doing this if register pressure is low to improve the chance that +/// subsequent instructions can use the reloaded value. This method returns the +/// modified instruction. /// -unsigned RA::reloadVirtReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator &I, - unsigned VirtReg) { - std::map::iterator It = Virt2PhysRegMap.find(VirtReg); - if (It != Virt2PhysRegMap.end()) { - MarkPhysRegRecentlyUsed(It->second); - return It->second; // Already have this value available! +MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, + unsigned OpNum) { + unsigned VirtReg = MI->getOperand(OpNum).getReg(); + + // If the virtual register is already available, just update the instruction + // and return. + if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) { + MarkPhysRegRecentlyUsed(PR); // Already have this value available! + MI->SetMachineOperandReg(OpNum, PR); // Assign the input register + return MI; } - unsigned PhysReg = getFreeReg(MBB, I, VirtReg); - + // Otherwise, we need to fold it into the current instruction, or reload it. + // If we have registers available to hold the value, use them. const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); + unsigned PhysReg = getFreeReg(RC); int FrameIndex = getStackSpaceFor(VirtReg, RC); - // Add move instruction(s) - RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC); - ++NumReloaded; // Update statistics - return PhysReg; -} - -/// CalculateLastUseOfVReg - Calculate an approximation of the killing uses for -/// the virtual registers in the function. Here we try to capture registers -/// that are defined and only used within the same basic block. Because we -/// don't have use-def chains yet, we have to do this the hard way. -/// -void RA::CalculateLastUseOfVReg(MachineBasicBlock &MBB, - std::map &LastUseOfVReg) const { - // Calculate the last machine instruction in this basic block that uses the - // specified virtual register defined in this basic block. - std::map LastLocalUses; - - for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;++I){ - MachineInstr *MI = *I; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &Op = MI->getOperand(i); - if (Op.isVirtualRegister()) { - if (Op.opIsDef()) { // Definition of a new virtual reg? - LastLocalUses[Op.getAllocatedRegNum()] = 0; // Record it - } else { // Use of a virtual reg. - std::map::iterator It = - LastLocalUses.find(Op.getAllocatedRegNum()); - if (It != LastLocalUses.end()) // Local use? - It->second = MI; // Update last use - else - LastUseOfVReg[Op.getAllocatedRegNum()] = 0; - } - } + if (PhysReg) { // Register is available, allocate it! + assignVirtToPhysReg(VirtReg, PhysReg); + } else { // No registers available. + // If we can fold this spill into this instruction, do so now. + if (MachineInstr* FMI = RegInfo->foldMemoryOperand(MI, OpNum, FrameIndex)){ + ++NumFolded; + // Since we changed the address of MI, make sure to update live variables + // to know that the new instruction has the properties of the old one. + LV->instructionChanged(MI, FMI); + return MBB.insert(MBB.erase(MI), FMI); } + + // It looks like we can't fold this virtual register load into this + // instruction. Force some poor hapless value out of the register file to + // make room for the new register, and reload it. + PhysReg = getReg(MBB, MI, VirtReg); } - // Move local uses over... if there are any uses of a local already in the - // lastuse map, the newly inserted entry is ignored. - LastUseOfVReg.insert(LastLocalUses.begin(), LastLocalUses.end()); -} - + markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded -/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in -/// predecessor basic blocks. -/// -void RA::EliminatePHINodes(MachineBasicBlock &MBB) { - const MachineInstrInfo &MII = TM->getInstrInfo(); - - while (MBB.front()->getOpcode() == MachineInstrInfo::PHI) { - MachineInstr *MI = MBB.front(); - // Unlink the PHI node from the basic block... but don't delete the PHI yet - MBB.erase(MBB.begin()); - - assert(MI->getOperand(0).isVirtualRegister() && - "PHI node doesn't write virt reg?"); - - unsigned virtualReg = MI->getOperand(0).getAllocatedRegNum(); - - for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) { - MachineOperand &opVal = MI->getOperand(i-1); - - // Get the MachineBasicBlock equivalent of the BasicBlock that is the - // source path the phi - MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock(); - - // Check to make sure we haven't already emitted the copy for this block. - // This can happen because PHI nodes may have multiple entries for the - // same basic block. It doesn't matter which entry we use though, because - // all incoming values are guaranteed to be the same for a particular bb. - // - // Note that this is N^2 in the number of phi node entries, but since the - // # of entries is tiny, this is not a problem. - // - bool HaveNotEmitted = true; - for (int op = MI->getNumOperands() - 1; op != i; op -= 2) - if (&opBlock == MI->getOperand(op).getMachineBasicBlock()) { - HaveNotEmitted = false; - break; - } + DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into " + << RegInfo->getName(PhysReg) << "\n"); - if (HaveNotEmitted) { - MachineBasicBlock::iterator opI = opBlock.end(); - MachineInstr *opMI = *--opI; - - // must backtrack over ALL the branches in the previous block - while (MII.isBranch(opMI->getOpcode()) && opI != opBlock.begin()) - opMI = *--opI; - - // move back to the first branch instruction so new instructions - // are inserted right in front of it and not in front of a non-branch - if (!MII.isBranch(opMI->getOpcode())) - ++opI; - - const TargetRegisterClass *RC = - MF->getSSARegMap()->getRegClass(virtualReg); - - assert(opVal.isVirtualRegister() && - "Machine PHI Operands must all be virtual registers!"); - RegInfo->copyRegToReg(opBlock, opI, virtualReg, opVal.getReg(), RC); - } - } - - // really delete the PHI instruction now! - delete MI; - } + // Add move instruction(s) + RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex); + ++NumLoads; // Update statistics + + PhysRegsEverUsed[PhysReg] = true; + MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register + return MI; } + void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { // loop over each instruction - MachineBasicBlock::iterator I = MBB.begin(); - for (; I != MBB.end(); ++I) { - MachineInstr *MI = *I; - const MachineInstrDescriptor &MID = TM->getInstrInfo().get(MI->getOpcode()); + MachineBasicBlock::iterator MI = MBB.begin(); + for (; MI != MBB.end(); ++MI) { + const TargetInstrDescriptor &TID = TM->getInstrInfo()->get(MI->getOpcode()); + DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI; + std::cerr << " Regs have values: "; + for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i) + if (PhysRegsUsed[i] != -1) + std::cerr << "[" << RegInfo->getName(i) + << ",%reg" << PhysRegsUsed[i] << "] "; + std::cerr << "\n"); + + // Loop over the implicit uses, making sure that they are at the head of the + // use order list, so they don't get reallocated. + for (const unsigned *ImplicitUses = TID.ImplicitUses; + *ImplicitUses; ++ImplicitUses) + MarkPhysRegRecentlyUsed(*ImplicitUses); + + // Get the used operands into registers. This has the potential to spill + // incoming values if we are out of registers. Note that we completely + // ignore physical register uses here. We assume that if an explicit + // physical register is referenced by the instruction, that it is guaranteed + // to be live-in, or the input is badly hosed. + // + for (unsigned i = 0; i != MI->getNumOperands(); ++i) { + MachineOperand& MO = MI->getOperand(i); + // here we are looking for only used operands (never def&use) + if (!MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isVirtualRegister(MO.getReg())) + MI = reloadVirtReg(MBB, MI, i); + } + + // If this instruction is the last user of anything in registers, kill the + // value, freeing the register being used, so it doesn't need to be + // spilled to memory. + // + for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), + KE = LV->killed_end(MI); KI != KE; ++KI) { + unsigned VirtReg = KI->second; + unsigned PhysReg = VirtReg; + if (MRegisterInfo::isVirtualRegister(VirtReg)) { + // If the virtual register was never materialized into a register, it + // might not be in the map, but it won't hurt to zero it out anyway. + unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); + PhysReg = PhysRegSlot; + PhysRegSlot = 0; + } + + if (PhysReg) { + DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg) + << "[%reg" << VirtReg <<"], removing it from live set\n"); + removePhysReg(PhysReg); + } + } // Loop over all of the operands of the instruction, spilling registers that // are defined, and marking explicit destinations in the PhysRegsUsed map. - - // FIXME: We don't need to spill a register if this is the last use of the - // value! - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).opIsDef() && - MI->getOperand(i).isPhysicalRegister()) { - unsigned Reg = MI->getOperand(i).getAllocatedRegNum(); - spillPhysReg(MBB, I, Reg); + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand& MO = MI->getOperand(i); + if (MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isPhysicalRegister(MO.getReg())) { + unsigned Reg = MO.getReg(); + PhysRegsEverUsed[Reg] = true; + spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg PhysRegsUsed[Reg] = 0; // It is free and reserved now PhysRegsUseOrder.push_back(Reg); + for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); + *AliasSet; ++AliasSet) { + PhysRegsUseOrder.push_back(*AliasSet); + PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now + PhysRegsEverUsed[*AliasSet] = true; + } } + } - // Loop over the implicit defs, spilling them, as above. - if (const unsigned *ImplicitDefs = MID.ImplicitDefs) - for (unsigned i = 0; ImplicitDefs[i]; ++i) { - unsigned Reg = ImplicitDefs[i]; - - // We don't want to spill implicit definitions if they were explicitly - // chosen. For this reason, check to see now if the register we are - // to spill has a vreg of 0. - if (PhysRegsUsed.count(Reg) && PhysRegsUsed[Reg] != 0) - spillPhysReg(MBB, I, Reg); - else if (PhysRegsUsed.count(Reg)) { - // Remove the entry from PhysRegsUseOrder to avoid having two entries! - removePhysReg(Reg); - } - PhysRegsUseOrder.push_back(Reg); - PhysRegsUsed[Reg] = 0; // It is free and reserved now + // Loop over the implicit defs, spilling them as well. + for (const unsigned *ImplicitDefs = TID.ImplicitDefs; + *ImplicitDefs; ++ImplicitDefs) { + unsigned Reg = *ImplicitDefs; + spillPhysReg(MBB, MI, Reg, true); + PhysRegsUseOrder.push_back(Reg); + PhysRegsUsed[Reg] = 0; // It is free and reserved now + PhysRegsEverUsed[Reg] = true; + + for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); + *AliasSet; ++AliasSet) { + PhysRegsUseOrder.push_back(*AliasSet); + PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now + PhysRegsEverUsed[*AliasSet] = true; } + } - // Loop over the implicit uses, making sure that they are at the head of the - // use order list, so they don't get reallocated. - if (const unsigned *ImplicitUses = MID.ImplicitUses) - for (unsigned i = 0; ImplicitUses[i]; ++i) - MarkPhysRegRecentlyUsed(ImplicitUses[i]); - - // Loop over all of the operands again, getting the used operands into - // registers. This has the potiential to spill incoming values if we are - // out of registers. - // - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).opIsUse() && - MI->getOperand(i).isVirtualRegister()) { - unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum(); - unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg); - MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register - } - // Okay, we have allocated all of the source operands and spilled any values // that would be destroyed by defs of this instruction. Loop over the - // implicit defs and assign them to a register, spilling the incoming value - // if we need to scavange a register. + // explicit defs and assign them to a register, spilling incoming values if + // we need to scavenge a register. // - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).opIsDef() && - !MI->getOperand(i).isPhysicalRegister()) { - unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum(); + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand& MO = MI->getOperand(i); + if (MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isVirtualRegister(MO.getReg())) { + unsigned DestVirtReg = MO.getReg(); unsigned DestPhysReg; - if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) { - // must be same register number as the first operand - // This maps a = b + c into b += c, and saves b into a's spot - assert(MI->getOperand(1).isRegister() && - MI->getOperand(1).getAllocatedRegNum() && - MI->getOperand(1).opIsUse() && - "Two address instruction invalid!"); - DestPhysReg = MI->getOperand(1).getAllocatedRegNum(); - - // Spill the incoming value, because we are about to change the - // register contents. - spillPhysReg(MBB, I, DestPhysReg); - AssignVirtToPhysReg(DestVirtReg, DestPhysReg); - } else { - DestPhysReg = getFreeReg(MBB, I, DestVirtReg); - } + // If DestVirtReg already has a value, use it. + if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg))) + DestPhysReg = getReg(MBB, MI, DestVirtReg); + PhysRegsEverUsed[DestPhysReg] = true; + markVirtRegModified(DestVirtReg); MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register } + } - if (!DisableKill) { - // If this instruction is the last user of anything in registers, kill the - // value, freeing the register being used, so it doesn't need to be - // spilled to memory at the end of the block. - std::multimap::iterator LUOI = - LastUserOf.lower_bound(MI); - for (; LUOI != LastUserOf.end() && LUOI->first == MI; ++MI) { - unsigned VirtReg = LUOI->second; // entry found? - unsigned PhysReg = Virt2PhysRegMap[VirtReg]; - if (PhysReg) { - DEBUG(std::cout << "V: " << VirtReg << " P: " << PhysReg - << " Last use of: " << *MI); - removePhysReg(PhysReg); - } - Virt2PhysRegMap.erase(VirtReg); + // If this instruction defines any registers that are immediately dead, + // kill them now. + // + for (LiveVariables::killed_iterator KI = LV->dead_begin(MI), + KE = LV->dead_end(MI); KI != KE; ++KI) { + unsigned VirtReg = KI->second; + unsigned PhysReg = VirtReg; + if (MRegisterInfo::isVirtualRegister(VirtReg)) { + unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); + PhysReg = PhysRegSlot; + assert(PhysReg != 0); + PhysRegSlot = 0; + } + + if (PhysReg) { + DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg) + << " [%reg" << VirtReg + << "] is never used, removing it frame live list\n"); + removePhysReg(PhysReg); } } } - // Rewind the iterator to point to the first flow control instruction... - const MachineInstrInfo &MII = TM->getInstrInfo(); - I = MBB.end(); - do { - --I; - } while ((MII.isReturn((*I)->getOpcode()) || - MII.isBranch((*I)->getOpcode())) && I != MBB.begin()); - - if (!MII.isReturn((*I)->getOpcode()) && !MII.isBranch((*I)->getOpcode())) - ++I; + MI = MBB.getFirstTerminator(); // Spill all physical registers holding virtual registers now. - while (!PhysRegsUsed.empty()) - spillVirtReg(MBB, I, PhysRegsUsed.begin()->second, - PhysRegsUsed.begin()->first); + for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i) + if (PhysRegsUsed[i] != -1) + if (unsigned VirtReg = PhysRegsUsed[i]) + spillVirtReg(MBB, MI, VirtReg, i); + else + removePhysReg(i); + +#ifndef NDEBUG + bool AllOk = true; + for (unsigned i = MRegisterInfo::FirstVirtualRegister, + e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i) + if (unsigned PR = Virt2PhysRegMap[i]) { + std::cerr << "Register still mapped: " << i << " -> " << PR << "\n"; + AllOk = false; + } + assert(AllOk && "Virtual registers still in phys regs?"); +#endif - assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?"); - assert(PhysRegsUseOrder.empty() && "Physical regs still allocated?"); + // Clear any physical register which appear live at the end of the basic + // block, but which do not hold any virtual registers. e.g., the stack + // pointer. + PhysRegsUseOrder.clear(); } @@ -586,42 +658,30 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) { MF = &Fn; TM = &Fn.getTarget(); RegInfo = TM->getRegisterInfo(); + LV = &getAnalysis(); - // First pass: eliminate PHI instructions by inserting copies into predecessor - // blocks, and calculate a simple approximation of killing uses for virtual - // registers. - // - std::map LastUseOfVReg; - for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); - MBB != MBBe; ++MBB) { - if (!DisableKill) - CalculateLastUseOfVReg(*MBB, LastUseOfVReg); - EliminatePHINodes(*MBB); - } + PhysRegsEverUsed = new bool[RegInfo->getNumRegs()]; + std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false); + Fn.setUsedPhysRegs(PhysRegsEverUsed); - // At this point LastUseOfVReg has been filled in to contain the last - // MachineInstr user of the specified virtual register, if that user is - // within the same basic block as the definition (otherwise it contains - // null). Invert this mapping now: - if (!DisableKill) - for (std::map::iterator I = LastUseOfVReg.begin(), - E = LastUseOfVReg.end(); I != E; ++I) - if (I->second) - LastUserOf.insert(std::make_pair(I->second, I->first)); + PhysRegsUsed.assign(RegInfo->getNumRegs(), -1); - // We're done with the temporary list now. - LastUseOfVReg.clear(); + // initialize the virtual->physical register map to have a 'null' + // mapping for all virtual registers + Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg()); // Loop over all of the basic blocks, eliminating virtual register references for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); MBB != MBBe; ++MBB) AllocateBasicBlock(*MBB); - LastUserOf.clear(); StackSlotForVirtReg.clear(); + PhysRegsUsed.clear(); + VirtRegModified.clear(); + Virt2PhysRegMap.clear(); return true; } -Pass *createLocalRegisterAllocator() { +FunctionPass *llvm::createLocalRegisterAllocator() { return new RA(); }