X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FRegAllocLocal.cpp;h=d3c3277cbbf35cbcc1fc0b63b6a4d1ad789dee18;hb=ef9531efedd2233269f670227fb0e6aae7480d53;hp=3f5310639585435788ce2dc63f18f177ac0e037a;hpb=1cbe4d0ad0888e50858cca83cf2a0d3083709513;p=oota-llvm.git diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index 3f531063958..d3c3277cbbf 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -1,10 +1,10 @@ //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This register allocator allocates registers to a basic block at a time, @@ -21,50 +21,37 @@ #include "llvm/CodeGen/LiveVariables.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" -#include "Support/CommandLine.h" -#include "Support/Debug.h" -#include "Support/Statistic.h" -#include +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Debug.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/Statistic.h" +#include using namespace llvm; namespace { - Statistic<> NumSpilled ("ra-local", "Number of registers spilled"); - Statistic<> NumReloaded("ra-local", "Number of registers reloaded"); - cl::opt DisableKill("disable-kill", cl::Hidden, - cl::desc("Disable register kill in local-ra")); - + Statistic<> NumStores("ra-local", "Number of stores added"); + Statistic<> NumLoads ("ra-local", "Number of loads added"); + Statistic<> NumFolded("ra-local", "Number of loads/stores folded into " + "instructions"); class RA : public MachineFunctionPass { const TargetMachine *TM; MachineFunction *MF; const MRegisterInfo *RegInfo; LiveVariables *LV; + bool *PhysRegsEverUsed; // StackSlotForVirtReg - Maps virtual regs to the frame index where these // values are spilled. std::map StackSlotForVirtReg; // Virt2PhysRegMap - This map contains entries for each virtual register - // that is currently available in a physical register. This is "logically" - // a map from virtual register numbers to physical register numbers. - // Instead of using a map, however, which is slow, we use a vector. The - // index is the VREG number - FirstVirtualRegister. If the entry is zero, - // then it is logically "not in the map". - // - std::vector Virt2PhysRegMap; + // that is currently available in a physical register. + DenseMap Virt2PhysRegMap; unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) { - assert(VirtReg >= MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #"); - assert(VirtReg-MRegisterInfo::FirstVirtualRegister = MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #"); - if (VirtReg-MRegisterInfo::FirstVirtualRegister >= Virt2PhysRegMap.size()) - Virt2PhysRegMap.resize(VirtReg-MRegisterInfo::FirstVirtualRegister+1); - return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister]; + return Virt2PhysRegMap[VirtReg]; } - + // PhysRegsUsed - This array is effectively a map, containing entries for // each physical register that currently has a value (ie, it is in // Virt2PhysRegMap). The value mapped to is the virtual register @@ -73,7 +60,7 @@ namespace { // because it is used by a future instruction. If the entry for a physical // register is -1, then the physical register is "not in the map". // - int PhysRegsUsed[MRegisterInfo::FirstVirtualRegister]; + std::vector PhysRegsUsed; // PhysRegsUseOrder - This contains a list of the physical registers that // currently have a virtual register value in them. This list provides an @@ -102,23 +89,23 @@ namespace { bool isVirtRegModified(unsigned Reg) const { assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!"); assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size() - && "Illegal virtual register!"); + && "Illegal virtual register!"); return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister]; } void MarkPhysRegRecentlyUsed(unsigned Reg) { - assert(!PhysRegsUseOrder.empty() && "No registers used!"); - if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used + if(PhysRegsUseOrder.empty() || + PhysRegsUseOrder.back() == Reg) return; // Already most recently used for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i) - if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) { - unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle - PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1); - // Add it to the end of the list - PhysRegsUseOrder.push_back(RegMatch); - if (RegMatch == Reg) - return; // Found an exact match, exit early - } + if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) { + unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle + PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1); + // Add it to the end of the list + PhysRegsUseOrder.push_back(RegMatch); + if (RegMatch == Reg) + return; // Found an exact match, exit early + } } public: @@ -127,8 +114,7 @@ namespace { } virtual void getAnalysisUsage(AnalysisUsage &AU) const { - if (!DisableKill) - AU.addRequired(); + AU.addRequired(); AU.addRequiredID(PHIEliminationID); AU.addRequiredID(TwoAddressInstructionPassID); MachineFunctionPass::getAnalysisUsage(AU); @@ -168,7 +154,7 @@ namespace { /// the virtual register slot specified by VirtReg. It then updates the RA /// data structures to indicate the fact that PhysReg is now available. /// - void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, + void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned VirtReg, unsigned PhysReg); /// spillPhysReg - This method spills the specified physical register into @@ -176,7 +162,7 @@ namespace { /// true, then the request is ignored if the physical register does not /// contain a virtual register. /// - void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, + void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I, unsigned PhysReg, bool OnlyVirtRegs = false); /// assignVirtToPhysReg - This method updates local state so that we know @@ -190,7 +176,7 @@ namespace { /// the way or spilled to memory. /// void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, - unsigned PhysReg); + unsigned PhysReg); /// isPhysRegAvailable - Return true if the specified physical register is /// free and available for use. This also includes checking to see if @@ -202,22 +188,29 @@ namespace { /// specified register class. If not, return 0. /// unsigned getFreeReg(const TargetRegisterClass *RC); - + /// getReg - Find a physical register to hold the specified virtual /// register. If all compatible physical registers are used, this method /// spills the last used virtual register to the stack, and uses that /// register. /// - unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, - unsigned VirtReg); - - /// reloadVirtReg - This method loads the specified virtual register into a - /// physical register, returning the physical register chosen. This updates - /// the regalloc data structures to reflect the fact that the virtual reg is - /// now alive in a physical register, and the previous one isn't. + unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI, + unsigned VirtReg); + + /// reloadVirtReg - This method transforms the specified specified virtual + /// register use to refer to a physical register. This method may do this + /// in one of several ways: if the register is available in a physical + /// register already, it uses that physical register. If the value is not + /// in a physical register, and if there are physical registers available, + /// it loads it into a register. If register pressure is high, and it is + /// possible, it tries to fold the load of the virtual register into the + /// instruction itself. It avoids doing this if register pressure is low to + /// improve the chance that subsequent instructions can use the reloaded + /// value. This method returns the modified instruction. /// - unsigned reloadVirtReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator &I, unsigned VirtReg); + MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, + unsigned OpNum); + void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, unsigned PhysReg); @@ -234,7 +227,8 @@ int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) { return I->second; // Already has space allocated? // Allocate a new stack object for this spill location... - int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC); + int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(), + RC->getAlignment()); // Assign the slot... StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx)); @@ -242,7 +236,7 @@ int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) { } -/// removePhysReg - This method marks the specified physical register as no +/// removePhysReg - This method marks the specified physical register as no /// longer being in use. /// void RA::removePhysReg(unsigned PhysReg) { @@ -259,9 +253,8 @@ void RA::removePhysReg(unsigned PhysReg) { /// virtual register slot specified by VirtReg. It then updates the RA data /// structures to indicate the fact that PhysReg is now available. /// -void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, +void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned VirtReg, unsigned PhysReg) { - if (!VirtReg && DisableKill) return; assert(VirtReg && "Spilling a physical register is illegal!" " Must not have appropriate kill for the register or use exists beyond" " the intended one."); @@ -277,8 +270,8 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); int FrameIndex = getStackSpaceFor(VirtReg, RC); DEBUG(std::cerr << " to stack slot #" << FrameIndex); - RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC); - ++NumSpilled; // Update statistics + RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex); + ++NumStores; // Update statistics } getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available @@ -293,7 +286,7 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, /// then the request is ignored if the physical register does not contain a /// virtual register. /// -void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, +void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I, unsigned PhysReg, bool OnlyVirtRegs) { if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used! if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs) @@ -319,7 +312,7 @@ void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) { // Update information to note the fact that this register was just used, and // it holds VirtReg. PhysRegsUsed[PhysReg] = VirtReg; - getOrInsertVirt2PhysRegMapSlot(VirtReg) = PhysReg; + getVirt2PhysRegMapSlot(VirtReg) = PhysReg; PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg } @@ -364,40 +357,7 @@ unsigned RA::getFreeReg(const TargetRegisterClass *RC) { /// or spilled to memory. /// void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, - unsigned PhysReg) { - // FIXME: This code checks to see if a register is available, but it really - // wants to know if a reg is available BEFORE the instruction executes. If - // called after killed operands are freed, it runs the risk of reallocating a - // used operand... -#if 0 - if (isPhysRegAvailable(PhysReg)) return; // Already available... - - // Check to see if the register is directly used, not indirectly used through - // aliases. If aliased registers are the ones actually used, we cannot be - // sure that we will be able to save the whole thing if we do a reg-reg copy. - if (PhysRegsUsed[PhysReg] != -1) { - // The virtual register held... - unsigned VirtReg = PhysRegsUsed[PhysReg]->second; - - // Check to see if there is a compatible register available. If so, we can - // move the value into the new register... - // - const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg); - if (unsigned NewReg = getFreeReg(RC)) { - // Emit the code to copy the value... - RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC); - - // Update our internal state to indicate that PhysReg is available and Reg - // isn't. - getVirt2PhysRegMapSlot[VirtReg] = 0; - removePhysReg(PhysReg); // Free the physreg - - // Move reference over to new register... - assignVirtToPhysReg(VirtReg, NewReg); - return; - } - } -#endif + unsigned PhysReg) { spillPhysReg(MBB, I, PhysReg); } @@ -406,8 +366,8 @@ void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, /// register. If all compatible physical registers are used, this method spills /// the last used virtual register to the stack, and uses that register. /// -unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, - unsigned VirtReg) { +unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I, + unsigned VirtReg) { const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); // First check to see if we have a free register of the requested type... @@ -423,7 +383,7 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, for (unsigned i = 0; PhysReg == 0; ++i) { assert(i != PhysRegsUseOrder.size() && "Couldn't find a register of the appropriate class!"); - + unsigned R = PhysRegsUseOrder[i]; // We can only use this register if it holds a virtual register (ie, it @@ -433,7 +393,7 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, "PhysReg in PhysRegsUseOrder, but is not allocated?"); if (PhysRegsUsed[R]) { // If the current register is compatible, use it. - if (RegInfo->getRegClass(R) == RC) { + if (RC->contains(R)) { PhysReg = R; break; } else { @@ -441,7 +401,7 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, // compatible, use it. for (const unsigned *AliasSet = RegInfo->getAliasSet(R); *AliasSet; ++AliasSet) { - if (RegInfo->getRegClass(*AliasSet) == RC) { + if (RC->contains(*AliasSet)) { PhysReg = *AliasSet; // Take an aliased register break; } @@ -463,43 +423,74 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, } -/// reloadVirtReg - This method loads the specified virtual register into a -/// physical register, returning the physical register chosen. This updates the -/// regalloc data structures to reflect the fact that the virtual reg is now -/// alive in a physical register, and the previous one isn't. +/// reloadVirtReg - This method transforms the specified specified virtual +/// register use to refer to a physical register. This method may do this in +/// one of several ways: if the register is available in a physical register +/// already, it uses that physical register. If the value is not in a physical +/// register, and if there are physical registers available, it loads it into a +/// register. If register pressure is high, and it is possible, it tries to +/// fold the load of the virtual register into the instruction itself. It +/// avoids doing this if register pressure is low to improve the chance that +/// subsequent instructions can use the reloaded value. This method returns the +/// modified instruction. /// -unsigned RA::reloadVirtReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator &I, - unsigned VirtReg) { - if (unsigned PR = getOrInsertVirt2PhysRegMapSlot(VirtReg)) { - MarkPhysRegRecentlyUsed(PR); - return PR; // Already have this value available! +MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, + unsigned OpNum) { + unsigned VirtReg = MI->getOperand(OpNum).getReg(); + + // If the virtual register is already available, just update the instruction + // and return. + if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) { + MarkPhysRegRecentlyUsed(PR); // Already have this value available! + MI->SetMachineOperandReg(OpNum, PR); // Assign the input register + return MI; } - unsigned PhysReg = getReg(MBB, I, VirtReg); - + // Otherwise, we need to fold it into the current instruction, or reload it. + // If we have registers available to hold the value, use them. const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); + unsigned PhysReg = getFreeReg(RC); int FrameIndex = getStackSpaceFor(VirtReg, RC); + if (PhysReg) { // Register is available, allocate it! + assignVirtToPhysReg(VirtReg, PhysReg); + } else { // No registers available. + // If we can fold this spill into this instruction, do so now. + if (MachineInstr* FMI = RegInfo->foldMemoryOperand(MI, OpNum, FrameIndex)){ + ++NumFolded; + // Since we changed the address of MI, make sure to update live variables + // to know that the new instruction has the properties of the old one. + LV->instructionChanged(MI, FMI); + return MBB.insert(MBB.erase(MI), FMI); + } + + // It looks like we can't fold this virtual register load into this + // instruction. Force some poor hapless value out of the register file to + // make room for the new register, and reload it. + PhysReg = getReg(MBB, MI, VirtReg); + } + markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into " << RegInfo->getName(PhysReg) << "\n"); // Add move instruction(s) - RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC); - ++NumReloaded; // Update statistics - return PhysReg; + RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex); + ++NumLoads; // Update statistics + + PhysRegsEverUsed[PhysReg] = true; + MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register + return MI; } void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { // loop over each instruction - MachineBasicBlock::iterator I = MBB.begin(); - for (; I != MBB.end(); ++I) { - MachineInstr *MI = *I; - const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode()); + MachineBasicBlock::iterator MI = MBB.begin(); + for (; MI != MBB.end(); ++MI) { + const TargetInstrDescriptor &TID = TM->getInstrInfo()->get(MI->getOpcode()); DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI; std::cerr << " Regs have values: "; for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i) @@ -520,136 +511,139 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { // physical register is referenced by the instruction, that it is guaranteed // to be live-in, or the input is badly hosed. // - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).isUse() && - !MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && - MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) { - unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum(); - unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg); - MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register + for (unsigned i = 0; i != MI->getNumOperands(); ++i) { + MachineOperand& MO = MI->getOperand(i); + // here we are looking for only used operands (never def&use) + if (!MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isVirtualRegister(MO.getReg())) + MI = reloadVirtReg(MBB, MI, i); + } + + // If this instruction is the last user of anything in registers, kill the + // value, freeing the register being used, so it doesn't need to be + // spilled to memory. + // + for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), + KE = LV->killed_end(MI); KI != KE; ++KI) { + unsigned VirtReg = KI->second; + unsigned PhysReg = VirtReg; + if (MRegisterInfo::isVirtualRegister(VirtReg)) { + // If the virtual register was never materialized into a register, it + // might not be in the map, but it won't hurt to zero it out anyway. + unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); + PhysReg = PhysRegSlot; + PhysRegSlot = 0; } - - if (!DisableKill) { - // If this instruction is the last user of anything in registers, kill the - // value, freeing the register being used, so it doesn't need to be - // spilled to memory. - // - for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), - KE = LV->killed_end(MI); KI != KE; ++KI) { - unsigned VirtReg = KI->second; - unsigned PhysReg = VirtReg; - if (MRegisterInfo::isVirtualRegister(VirtReg)) { - unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); - PhysReg = PhysRegSlot; - assert(PhysReg != 0); - PhysRegSlot = 0; - } - if (PhysReg) { - DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg) - << "[%reg" << VirtReg <<"], removing it from live set\n"); - removePhysReg(PhysReg); - } + if (PhysReg) { + DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg) + << "[%reg" << VirtReg <<"], removing it from live set\n"); + removePhysReg(PhysReg); } } // Loop over all of the operands of the instruction, spilling registers that // are defined, and marking explicit destinations in the PhysRegsUsed map. - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && - MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) { - unsigned Reg = MI->getOperand(i).getAllocatedRegNum(); - spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand& MO = MI->getOperand(i); + if (MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isPhysicalRegister(MO.getReg())) { + unsigned Reg = MO.getReg(); + PhysRegsEverUsed[Reg] = true; + spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg PhysRegsUsed[Reg] = 0; // It is free and reserved now PhysRegsUseOrder.push_back(Reg); for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); *AliasSet; ++AliasSet) { PhysRegsUseOrder.push_back(*AliasSet); PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now + PhysRegsEverUsed[*AliasSet] = true; } } + } // Loop over the implicit defs, spilling them as well. for (const unsigned *ImplicitDefs = TID.ImplicitDefs; *ImplicitDefs; ++ImplicitDefs) { unsigned Reg = *ImplicitDefs; - spillPhysReg(MBB, I, Reg); + spillPhysReg(MBB, MI, Reg, true); PhysRegsUseOrder.push_back(Reg); PhysRegsUsed[Reg] = 0; // It is free and reserved now + PhysRegsEverUsed[Reg] = true; + for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); *AliasSet; ++AliasSet) { PhysRegsUseOrder.push_back(*AliasSet); PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now + PhysRegsEverUsed[*AliasSet] = true; } } // Okay, we have allocated all of the source operands and spilled any values // that would be destroyed by defs of this instruction. Loop over the - // implicit defs and assign them to a register, spilling incoming values if + // explicit defs and assign them to a register, spilling incoming values if // we need to scavenge a register. // - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() && - MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) { - unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum(); + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand& MO = MI->getOperand(i); + if (MO.isDef() && MO.isRegister() && MO.getReg() && + MRegisterInfo::isVirtualRegister(MO.getReg())) { + unsigned DestVirtReg = MO.getReg(); unsigned DestPhysReg; // If DestVirtReg already has a value, use it. - if (!(DestPhysReg = getOrInsertVirt2PhysRegMapSlot(DestVirtReg))) - DestPhysReg = getReg(MBB, I, DestVirtReg); + if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg))) + DestPhysReg = getReg(MBB, MI, DestVirtReg); + PhysRegsEverUsed[DestPhysReg] = true; markVirtRegModified(DestVirtReg); MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register } + } - if (!DisableKill) { - // If this instruction defines any registers that are immediately dead, - // kill them now. - // - for (LiveVariables::killed_iterator KI = LV->dead_begin(MI), - KE = LV->dead_end(MI); KI != KE; ++KI) { - unsigned VirtReg = KI->second; - unsigned PhysReg = VirtReg; - if (MRegisterInfo::isVirtualRegister(VirtReg)) { - unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); - PhysReg = PhysRegSlot; - assert(PhysReg != 0); - PhysRegSlot = 0; - } + // If this instruction defines any registers that are immediately dead, + // kill them now. + // + for (LiveVariables::killed_iterator KI = LV->dead_begin(MI), + KE = LV->dead_end(MI); KI != KE; ++KI) { + unsigned VirtReg = KI->second; + unsigned PhysReg = VirtReg; + if (MRegisterInfo::isVirtualRegister(VirtReg)) { + unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); + PhysReg = PhysRegSlot; + assert(PhysReg != 0); + PhysRegSlot = 0; + } - if (PhysReg) { - DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg) - << " [%reg" << VirtReg - << "] is never used, removing it frame live list\n"); - removePhysReg(PhysReg); - } + if (PhysReg) { + DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg) + << " [%reg" << VirtReg + << "] is never used, removing it frame live list\n"); + removePhysReg(PhysReg); } } } - // Rewind the iterator to point to the first flow control instruction... - const TargetInstrInfo &TII = TM->getInstrInfo(); - I = MBB.end(); - while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode())) - --I; + MI = MBB.getFirstTerminator(); // Spill all physical registers holding virtual registers now. for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i) if (PhysRegsUsed[i] != -1) if (unsigned VirtReg = PhysRegsUsed[i]) - spillVirtReg(MBB, I, VirtReg, i); + spillVirtReg(MBB, MI, VirtReg, i); else removePhysReg(i); #ifndef NDEBUG bool AllOk = true; - for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i) + for (unsigned i = MRegisterInfo::FirstVirtualRegister, + e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i) if (unsigned PR = Virt2PhysRegMap[i]) { std::cerr << "Register still mapped: " << i << " -> " << PR << "\n"; AllOk = false; } assert(AllOk && "Virtual registers still in phys regs?"); #endif - + // Clear any physical register which appear live at the end of the basic // block, but which do not hold any virtual registers. e.g., the stack // pointer. @@ -664,16 +658,17 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) { MF = &Fn; TM = &Fn.getTarget(); RegInfo = TM->getRegisterInfo(); + LV = &getAnalysis(); - memset(PhysRegsUsed, -1, RegInfo->getNumRegs()*sizeof(unsigned)); + PhysRegsEverUsed = new bool[RegInfo->getNumRegs()]; + std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false); + Fn.setUsedPhysRegs(PhysRegsEverUsed); - // Reserve some space for a moderate number of registers. If we know what the - // max virtual register number was we could use that instead and save some - // runtime overhead... - Virt2PhysRegMap.resize(1024); + PhysRegsUsed.assign(RegInfo->getNumRegs(), -1); - if (!DisableKill) - LV = &getAnalysis(); + // initialize the virtual->physical register map to have a 'null' + // mapping for all virtual registers + Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg()); // Loop over all of the basic blocks, eliminating virtual register references for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); @@ -681,6 +676,7 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) { AllocateBasicBlock(*MBB); StackSlotForVirtReg.clear(); + PhysRegsUsed.clear(); VirtRegModified.clear(); Virt2PhysRegMap.clear(); return true; @@ -689,4 +685,3 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) { FunctionPass *llvm::createLocalRegisterAllocator() { return new RA(); } -