X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FRegAllocLocal.cpp;h=d3c3277cbbf35cbcc1fc0b63b6a4d1ad789dee18;hb=ef9531efedd2233269f670227fb0e6aae7480d53;hp=4c7ccdf8758db9bc0e81ab278e890179e698848f;hpb=aebcce840429a2f9dd0a17c300a91901528cb953;p=oota-llvm.git diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index 4c7ccdf8758..d3c3277cbbf 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -21,11 +21,11 @@ #include "llvm/CodeGen/LiveVariables.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" -#include "Support/CommandLine.h" -#include "Support/Debug.h" -#include "Support/DenseMap.h" -#include "Support/Statistic.h" -#include +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Debug.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/Statistic.h" +#include using namespace llvm; namespace { @@ -38,6 +38,7 @@ namespace { MachineFunction *MF; const MRegisterInfo *RegInfo; LiveVariables *LV; + bool *PhysRegsEverUsed; // StackSlotForVirtReg - Maps virtual regs to the frame index where these // values are spilled. @@ -226,7 +227,8 @@ int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) { return I->second; // Already has space allocated? // Allocate a new stack object for this spill location... - int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC); + int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(), + RC->getAlignment()); // Assign the slot... StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx)); @@ -268,7 +270,7 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); int FrameIndex = getStackSpaceFor(VirtReg, RC); DEBUG(std::cerr << " to stack slot #" << FrameIndex); - RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC); + RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex); ++NumStores; // Update statistics } @@ -356,39 +358,6 @@ unsigned RA::getFreeReg(const TargetRegisterClass *RC) { /// void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, unsigned PhysReg) { - // FIXME: This code checks to see if a register is available, but it really - // wants to know if a reg is available BEFORE the instruction executes. If - // called after killed operands are freed, it runs the risk of reallocating a - // used operand... -#if 0 - if (isPhysRegAvailable(PhysReg)) return; // Already available... - - // Check to see if the register is directly used, not indirectly used through - // aliases. If aliased registers are the ones actually used, we cannot be - // sure that we will be able to save the whole thing if we do a reg-reg copy. - if (PhysRegsUsed[PhysReg] != -1) { - // The virtual register held... - unsigned VirtReg = PhysRegsUsed[PhysReg]->second; - - // Check to see if there is a compatible register available. If so, we can - // move the value into the new register... - // - const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg); - if (unsigned NewReg = getFreeReg(RC)) { - // Emit the code to copy the value... - RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC); - - // Update our internal state to indicate that PhysReg is available and Reg - // isn't. - getVirt2PhysRegMapSlot[VirtReg] = 0; - removePhysReg(PhysReg); // Free the physreg - - // Move reference over to new register... - assignVirtToPhysReg(VirtReg, NewReg); - return; - } - } -#endif spillPhysReg(MBB, I, PhysReg); } @@ -424,7 +393,7 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I, "PhysReg in PhysRegsUseOrder, but is not allocated?"); if (PhysRegsUsed[R]) { // If the current register is compatible, use it. - if (RegInfo->getRegClass(R) == RC) { + if (RC->contains(R)) { PhysReg = R; break; } else { @@ -432,7 +401,7 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I, // compatible, use it. for (const unsigned *AliasSet = RegInfo->getAliasSet(R); *AliasSet; ++AliasSet) { - if (RegInfo->getRegClass(*AliasSet) == RC) { + if (RC->contains(*AliasSet)) { PhysReg = *AliasSet; // Take an aliased register break; } @@ -507,9 +476,10 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, << RegInfo->getName(PhysReg) << "\n"); // Add move instruction(s) - RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC); + RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex); ++NumLoads; // Update statistics + PhysRegsEverUsed[PhysReg] = true; MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register return MI; } @@ -579,6 +549,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { if (MO.isDef() && MO.isRegister() && MO.getReg() && MRegisterInfo::isPhysicalRegister(MO.getReg())) { unsigned Reg = MO.getReg(); + PhysRegsEverUsed[Reg] = true; spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg PhysRegsUsed[Reg] = 0; // It is free and reserved now PhysRegsUseOrder.push_back(Reg); @@ -586,6 +557,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { *AliasSet; ++AliasSet) { PhysRegsUseOrder.push_back(*AliasSet); PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now + PhysRegsEverUsed[*AliasSet] = true; } } } @@ -597,16 +569,19 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { spillPhysReg(MBB, MI, Reg, true); PhysRegsUseOrder.push_back(Reg); PhysRegsUsed[Reg] = 0; // It is free and reserved now + PhysRegsEverUsed[Reg] = true; + for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); *AliasSet; ++AliasSet) { PhysRegsUseOrder.push_back(*AliasSet); PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now + PhysRegsEverUsed[*AliasSet] = true; } } // Okay, we have allocated all of the source operands and spilled any values // that would be destroyed by defs of this instruction. Loop over the - // implicit defs and assign them to a register, spilling incoming values if + // explicit defs and assign them to a register, spilling incoming values if // we need to scavenge a register. // for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { @@ -619,6 +594,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { // If DestVirtReg already has a value, use it. if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg))) DestPhysReg = getReg(MBB, MI, DestVirtReg); + PhysRegsEverUsed[DestPhysReg] = true; markVirtRegModified(DestVirtReg); MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register } @@ -684,6 +660,10 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) { RegInfo = TM->getRegisterInfo(); LV = &getAnalysis(); + PhysRegsEverUsed = new bool[RegInfo->getNumRegs()]; + std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false); + Fn.setUsedPhysRegs(PhysRegsEverUsed); + PhysRegsUsed.assign(RegInfo->getNumRegs(), -1); // initialize the virtual->physical register map to have a 'null'