X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FSelectionDAG%2FResourcePriorityQueue.cpp;h=db38b76cf93a982b34a5992fa3cd32d1421f09d6;hb=529ff2f2575d4be7ac57b291f493a3c659f5107e;hp=8852cd5b5cf8291c0467e0699cbbfe5c9538760e;hpb=9f85dccfc64b5f0b0c63ddfa0a42d8615aa1fcb3;p=oota-llvm.git diff --git a/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp b/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp index 8852cd5b5cf..db38b76cf93 100644 --- a/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp +++ b/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp @@ -42,15 +42,12 @@ static cl::opt RegPressureThreshold( cl::desc("Track reg pressure and switch priority to in-depth")); ResourcePriorityQueue::ResourcePriorityQueue(SelectionDAGISel *IS) - : Picker(this), InstrItins(IS->getTargetLowering() - ->getTargetMachine() - .getSubtargetImpl() - ->getInstrItineraryData()) { - const TargetMachine &TM = (*IS->MF).getTarget(); - TRI = TM.getSubtargetImpl()->getRegisterInfo(); - TLI = IS->getTargetLowering(); - TII = TM.getSubtargetImpl()->getInstrInfo(); - ResourcesModel = TII->CreateTargetScheduleState(&TM, nullptr); + : Picker(this), InstrItins(IS->MF->getSubtarget().getInstrItineraryData()) { + const TargetSubtargetInfo &STI = IS->MF->getSubtarget(); + TRI = STI.getRegisterInfo(); + TLI = IS->TLI; + TII = STI.getInstrInfo(); + ResourcesModel = TII->CreateTargetScheduleState(STI); // This hard requirement could be relaxed, but for now // do not let it procede. assert(ResourcesModel && "Unimplemented CreateTargetScheduleState."); @@ -320,7 +317,7 @@ void ResourcePriorityQueue::reserveResources(SUnit *SU) { // If packet is now full, reset the state so in the next cycle // we start fresh. - if (Packet.size() >= InstrItins->SchedModel->IssueWidth) { + if (Packet.size() >= InstrItins->SchedModel.IssueWidth) { ResourcesModel->clearResources(); Packet.clear(); }