X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FSimpleRegisterCoalescing.cpp;h=bc833633ed24f05cb43fa5458e1605b02ee6e3b3;hb=5ac319ac7125b009adddcc49294d2e040c4a91e5;hp=61f9700d5641ab02e6da83084c7244e3fb9c9cfd;hpb=172b70c62a315de654a4d1683dbb5544e67afa90;p=oota-llvm.git diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 61f9700d564..bc833633ed2 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -17,7 +17,6 @@ #include "VirtRegMap.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/Value.h" -#include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineLoopInfo.h" @@ -36,31 +35,35 @@ using namespace llvm; STATISTIC(numJoins , "Number of interval joins performed"); +STATISTIC(numSubJoins , "Number of subclass joins performed"); STATISTIC(numCommutes , "Number of instruction commuting performed"); STATISTIC(numExtends , "Number of copies extended"); STATISTIC(numPeep , "Number of identity moves eliminated after coalescing"); STATISTIC(numAborts , "Number of times interval joining aborted"); char SimpleRegisterCoalescing::ID = 0; -namespace { - static cl::opt - EnableJoining("join-liveintervals", - cl::desc("Coalesce copies (default=true)"), - cl::init(true)); +static cl::opt +EnableJoining("join-liveintervals", + cl::desc("Coalesce copies (default=true)"), + cl::init(true)); - static cl::opt - NewHeuristic("new-coalescer-heuristic", - cl::desc("Use new coalescer heuristic"), - cl::init(false)); +static cl::opt +NewHeuristic("new-coalescer-heuristic", + cl::desc("Use new coalescer heuristic"), + cl::init(false), cl::Hidden); - RegisterPass - X("simple-register-coalescing", "Simple Register Coalescing"); +static cl::opt +CrossClassJoin("join-subclass-copies", + cl::desc("Coalesce copies to sub- register class"), + cl::init(false), cl::Hidden); - // Declare that we implement the RegisterCoalescer interface - RegisterAnalysisGroup V(X); -} +static RegisterPass +X("simple-register-coalescing", "Simple Register Coalescing"); -const PassInfo *llvm::SimpleRegisterCoalescingID = X.getPassInfo(); +// Declare that we implement the RegisterCoalescer interface +static RegisterAnalysisGroup V(X); + +const PassInfo *const llvm::SimpleRegisterCoalescingID = &X; void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreserved(); @@ -68,7 +71,6 @@ void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreservedID(MachineDominatorsID); AU.addPreservedID(PHIEliminationID); AU.addPreservedID(TwoAddressInstructionPassID); - AU.addRequired(); AU.addRequired(); AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); @@ -97,6 +99,8 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, // BValNo is a value number in B that is defined by a copy from A. 'B3' in // the example above. LiveInterval::iterator BLR = IntB.FindLiveRangeContaining(CopyIdx); + if (BLR == IntB.end()) // Should never happen! + return false; VNInfo *BValNo = BLR->valno; // Get the location that B is defined at. Two options: either this value has @@ -107,6 +111,8 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, // AValNo is the value number in A that defines the copy, A3 in the example. LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyIdx-1); + if (ALR == IntA.end()) // Should never happen! + return false; VNInfo *AValNo = ALR->valno; // If AValNo is defined as a copy from IntB, we can potentially process this. @@ -122,6 +128,8 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, // Get the LiveRange in IntB that this value number starts with. LiveInterval::iterator ValLR = IntB.FindLiveRangeContaining(AValNo->def-1); + if (ValLR == IntB.end()) // Should never happen! + return false; // Make sure that the end of the live range is inside the same block as // CopyMI. @@ -251,6 +259,8 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, // BValNo is a value number in B that is defined by a copy from A. 'B3' in // the example above. LiveInterval::iterator BLR = IntB.FindLiveRangeContaining(CopyIdx); + if (BLR == IntB.end()) // Should never happen! + return false; VNInfo *BValNo = BLR->valno; // Get the location that B is defined at. Two options: either this value has @@ -261,6 +271,8 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, // AValNo is the value number in A that defines the copy, A3 in the example. LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyIdx-1); + if (ALR == IntA.end()) // Should never happen! + return false; VNInfo *AValNo = ALR->valno; // If other defs can reach uses of this def, then it's not safe to perform // the optimization. @@ -290,6 +302,8 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, MachineInstr *UseMI = &*UI; unsigned UseIdx = li_->getInstructionIndex(UseMI); LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx); + if (ULR == IntA.end()) + continue; if (ULR->valno == AValNo && JoinedCopies.count(UseMI)) return false; } @@ -337,7 +351,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, continue; unsigned UseIdx = li_->getInstructionIndex(UseMI); LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx); - if (ULR->valno != AValNo) + if (ULR == IntA.end() || ULR->valno != AValNo) continue; UseMO.setReg(NewReg); if (UseMI == CopyMI) @@ -356,7 +370,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, // remove that val# as well. However this live range is being // extended to the end of the existing live range defined by the copy. unsigned DefIdx = li_->getDefIndex(UseIdx); - LiveInterval::iterator DLR = IntB.FindLiveRangeContaining(DefIdx); + const LiveRange *DLR = IntB.getLiveRangeContaining(DefIdx); BHasPHIKill |= DLR->valno->hasPHIKill; assert(DLR->valno->def == DefIdx); BDeadValNos.push_back(DLR->valno); @@ -373,10 +387,21 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, // simply extend BLR if CopyMI doesn't end the range. DOUT << "\nExtending: "; IntB.print(DOUT, tri_); - IntB.removeValNo(BValNo); + // Remove val#'s defined by copies that will be coalesced away. for (unsigned i = 0, e = BDeadValNos.size(); i != e; ++i) IntB.removeValNo(BDeadValNos[i]); - VNInfo *ValNo = IntB.getNextValue(AValNo->def, 0, li_->getVNInfoAllocator()); + + // Extend BValNo by merging in IntA live ranges of AValNo. Val# definition + // is updated. Kills are also updated. + VNInfo *ValNo = BValNo; + ValNo->def = AValNo->def; + ValNo->copy = NULL; + for (unsigned j = 0, ee = ValNo->kills.size(); j != ee; ++j) { + unsigned Kill = ValNo->kills[j]; + if (Kill != BLR->end) + BKills.push_back(Kill); + } + ValNo->kills.clear(); for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end(); AI != AE; ++AI) { if (AI->valno != AValNo) continue; @@ -418,7 +443,7 @@ bool SimpleRegisterCoalescing::isBackEdgeCopy(MachineInstr *CopyMI, LI.FindLiveRangeContaining(li_->getDefIndex(DefIdx)); if (DstLR == LI.end()) return false; - unsigned KillIdx = li_->getInstructionIndex(&MBB->back()) + InstrSlots::NUM; + unsigned KillIdx = li_->getMBBEndIdx(MBB) + 1; if (DstLR->valno->kills.size() == 1 && DstLR->valno->kills[0] == KillIdx && DstLR->valno->hasPHIKill) return true; @@ -445,18 +470,17 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, MachineOperand &O = I.getOperand(); MachineInstr *UseMI = &*I; ++I; + unsigned OldSubIdx = O.getSubReg(); if (DstIsPhys) { - unsigned UseSubIdx = O.getSubReg(); unsigned UseDstReg = DstReg; - if (UseSubIdx) - UseDstReg = tri_->getSubReg(DstReg, UseSubIdx); + if (OldSubIdx) + UseDstReg = tri_->getSubReg(DstReg, OldSubIdx); O.setReg(UseDstReg); O.setSubReg(0); } else { - unsigned OldSubIdx = O.getSubReg(); // Sub-register indexes goes from small to large. e.g. - // RAX: 0 -> AL, 1 -> AH, 2 -> AX, 3 -> EAX - // EAX: 0 -> AL, 1 -> AH, 2 -> AX + // RAX: 1 -> AL, 2 -> AX, 3 -> EAX + // EAX: 1 -> AL, 2 -> AX // So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is EAX, whose // sub-register 2 is also AX. if (SubIdx && OldSubIdx && SubIdx != OldSubIdx) @@ -515,8 +539,7 @@ void SimpleRegisterCoalescing::RemoveUnnecessaryKills(unsigned Reg, unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); if (JoinedCopies.count(UseMI)) continue; - LiveInterval::const_iterator UI = LI.FindLiveRangeContaining(UseIdx); - assert(UI != LI.end()); + const LiveRange *UI = LI.getLiveRangeContaining(UseIdx); if (!LI.isKill(UI->valno, UseIdx+1)) UseMO.setIsKill(false); } @@ -549,11 +572,10 @@ static void removeRange(LiveInterval &li, unsigned Start, unsigned End, /// removeIntervalIfEmpty - Check if the live interval of a physical register /// is empty, if so remove it and also remove the empty intervals of its -/// sub-registers. -static void removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *li_, +/// sub-registers. Return true if live interval is removed. +static bool removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *li_, const TargetRegisterInfo *tri_) { if (li.empty()) { - li_->removeInterval(li.reg); if (TargetRegisterInfo::isPhysicalRegister(li.reg)) for (const unsigned* SR = tri_->getSubRegisters(li.reg); *SR; ++SR) { if (!li_->hasInterval(*SR)) @@ -562,25 +584,29 @@ static void removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *li_, if (sli.empty()) li_->removeInterval(*SR); } + li_->removeInterval(li.reg); + return true; } + return false; } /// ShortenDeadCopyLiveRange - Shorten a live range defined by a dead copy. -/// -void SimpleRegisterCoalescing::ShortenDeadCopyLiveRange(LiveInterval &li, +/// Return true if live interval is removed. +bool SimpleRegisterCoalescing::ShortenDeadCopyLiveRange(LiveInterval &li, MachineInstr *CopyMI) { unsigned CopyIdx = li_->getInstructionIndex(CopyMI); LiveInterval::iterator MLR = li.FindLiveRangeContaining(li_->getDefIndex(CopyIdx)); if (MLR == li.end()) - return; // Already removed by ShortenDeadCopySrcLiveRange. + return false; // Already removed by ShortenDeadCopySrcLiveRange. unsigned RemoveStart = MLR->start; unsigned RemoveEnd = MLR->end; // Remove the liverange that's defined by this. if (RemoveEnd == li_->getDefIndex(CopyIdx)+1) { removeRange(li, RemoveStart, RemoveEnd, li_, tri_); - removeIntervalIfEmpty(li, li_, tri_); + return removeIntervalIfEmpty(li, li_, tri_); } + return false; } /// PropagateDeadness - Propagate the dead marker to the instruction which @@ -600,11 +626,24 @@ static void PropagateDeadness(LiveInterval &li, MachineInstr *CopyMI, } } -/// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially -/// extended by a dead copy. Mark the last use (if any) of the val# as kill -/// as ends the live range there. If there isn't another use, then this -/// live range is dead. -void +/// isSameOrFallThroughBB - Return true if MBB == SuccMBB or MBB simply +/// fallthoughs to SuccMBB. +static bool isSameOrFallThroughBB(MachineBasicBlock *MBB, + MachineBasicBlock *SuccMBB, + const TargetInstrInfo *tii_) { + if (MBB == SuccMBB) + return true; + MachineBasicBlock *TBB = 0, *FBB = 0; + std::vector Cond; + return !tii_->AnalyzeBranch(*MBB, TBB, FBB, Cond) && !TBB && !FBB && + MBB->isSuccessor(SuccMBB); +} + +/// ShortenDeadCopySrcLiveRange - Shorten a live range as it's artificially +/// extended by a dead copy. Mark the last use (if any) of the val# as kill as +/// ends the live range there. If there isn't another use, then this live range +/// is dead. Return true if live interval is removed. +bool SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li, MachineInstr *CopyMI) { unsigned CopyIdx = li_->getInstructionIndex(CopyMI); @@ -613,32 +652,47 @@ SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li, // first instruction index starts at > 0 value. assert(TargetRegisterInfo::isPhysicalRegister(li.reg)); // Live-in to the function but dead. Remove it from entry live-in set. - mf_->begin()->removeLiveIn(li.reg); - LiveInterval::iterator LR = li.FindLiveRangeContaining(CopyIdx); + if (mf_->begin()->isLiveIn(li.reg)) + mf_->begin()->removeLiveIn(li.reg); + const LiveRange *LR = li.getLiveRangeContaining(CopyIdx); removeRange(li, LR->start, LR->end, li_, tri_); - removeIntervalIfEmpty(li, li_, tri_); - return; + return removeIntervalIfEmpty(li, li_, tri_); } LiveInterval::iterator LR = li.FindLiveRangeContaining(CopyIdx-1); if (LR == li.end()) // Livein but defined by a phi. - return; + return false; unsigned RemoveStart = LR->start; unsigned RemoveEnd = li_->getDefIndex(CopyIdx)+1; if (LR->end > RemoveEnd) // More uses past this copy? Nothing to do. - return; + return false; + MachineBasicBlock *CopyMBB = CopyMI->getParent(); + unsigned MBBStart = li_->getMBBStartIdx(CopyMBB); unsigned LastUseIdx; - MachineOperand *LastUse = - lastRegisterUse(LR->start, CopyIdx-1, li.reg, LastUseIdx); + MachineOperand *LastUse = lastRegisterUse(LR->start, CopyIdx-1, li.reg, + LastUseIdx); if (LastUse) { + MachineInstr *LastUseMI = LastUse->getParent(); + if (!isSameOrFallThroughBB(LastUseMI->getParent(), CopyMBB, tii_)) { + // r1024 = op + // ... + // BB1: + // = r1024 + // + // BB2: + // r1025 = r1024 + if (MBBStart < LR->end) + removeRange(li, MBBStart, LR->end, li_, tri_); + return false; + } + // There are uses before the copy, just shorten the live range to the end // of last use. LastUse->setIsKill(); - MachineInstr *LastUseMI = LastUse->getParent(); removeRange(li, li_->getDefIndex(LastUseIdx), LR->end, li_, tri_); unsigned SrcReg, DstReg; if (tii_->isMoveInstr(*LastUseMI, SrcReg, DstReg) && @@ -647,12 +701,10 @@ SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li, int DeadIdx = LastUseMI->findRegisterDefOperandIdx(li.reg, false, tri_); LastUseMI->getOperand(DeadIdx).setIsDead(); } - return; + return false; } // Is it livein? - MachineBasicBlock *CopyMBB = CopyMI->getParent(); - unsigned MBBStart = li_->getMBBStartIdx(CopyMBB); if (LR->start <= MBBStart && LR->end > MBBStart) { if (LR->start == 0) { assert(TargetRegisterInfo::isPhysicalRegister(li.reg)); @@ -667,7 +719,7 @@ SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li, PropagateDeadness(li, CopyMI, RemoveStart, li_, tri_); removeRange(li, RemoveStart, LR->end, li_, tri_); - removeIntervalIfEmpty(li, li_, tri_); + return removeIntervalIfEmpty(li, li_, tri_); } /// CanCoalesceWithImpDef - Returns true if the specified copy instruction @@ -694,7 +746,7 @@ bool SimpleRegisterCoalescing::CanCoalesceWithImpDef(MachineInstr *CopyMI, continue; unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); LiveInterval::iterator ULR = li.FindLiveRangeContaining(UseIdx); - if (ULR->valno != LR->valno) + if (ULR == li.end() || ULR->valno != LR->valno) continue; // If the use is not a use, then it's not safe to coalesce the move. unsigned SrcReg, DstReg; @@ -714,29 +766,51 @@ bool SimpleRegisterCoalescing::CanCoalesceWithImpDef(MachineInstr *CopyMI, /// identity copies so they will be removed. void SimpleRegisterCoalescing::RemoveCopiesFromValNo(LiveInterval &li, VNInfo *VNI) { - for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(li.reg), - UE = mri_->use_end(); UI != UE;) { - MachineInstr *UseMI = &*UI; - ++UI; - if (JoinedCopies.count(UseMI)) + SmallVector ImpDefs; + MachineOperand *LastUse = NULL; + unsigned LastUseIdx = li_->getUseIndex(VNI->def); + for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(li.reg), + RE = mri_->reg_end(); RI != RE;) { + MachineOperand *MO = &RI.getOperand(); + MachineInstr *MI = &*RI; + ++RI; + if (MO->isDef()) { + if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) { + ImpDefs.push_back(MI); + } continue; - unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); - LiveInterval::iterator ULR = li.FindLiveRangeContaining(UseIdx); - if (ULR->valno != VNI) + } + if (JoinedCopies.count(MI)) continue; - if (UseMI->getOpcode() == TargetInstrInfo::INSERT_SUBREG) + unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(MI)); + LiveInterval::iterator ULR = li.FindLiveRangeContaining(UseIdx); + if (ULR == li.end() || ULR->valno != VNI) continue; // If the use is a copy, turn it into an identity copy. unsigned SrcReg, DstReg; - if (!tii_->isMoveInstr(*UseMI, SrcReg, DstReg) || SrcReg != li.reg) - assert(0 && "Unexpected use of implicit def!"); - // Each UseMI may have multiple uses of this register. Change them all. - for (unsigned i = 0, e = UseMI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = UseMI->getOperand(i); - if (MO.isReg() && MO.getReg() == li.reg) - MO.setReg(DstReg); + if (tii_->isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == li.reg) { + // Each use MI may have multiple uses of this register. Change them all. + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI->getOperand(i); + if (MO.isReg() && MO.getReg() == li.reg) + MO.setReg(DstReg); + } + JoinedCopies.insert(MI); + } else if (UseIdx > LastUseIdx) { + LastUseIdx = UseIdx; + LastUse = MO; + } + } + if (LastUse) + LastUse->setIsKill(); + else { + // Remove dead implicit_def's. + while (!ImpDefs.empty()) { + MachineInstr *ImpDef = ImpDefs.back(); + ImpDefs.pop_back(); + li_->RemoveMachineInstrFromMaps(ImpDef); + ImpDef->eraseFromParent(); } - JoinedCopies.insert(UseMI); } } @@ -750,6 +824,41 @@ static unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, return 0; } +/// isProfitableToCoalesceToSubRC - Given that register class of DstReg is +/// a subset of the register class of SrcReg, return true if it's profitable +/// to coalesce the two registers. +bool +SimpleRegisterCoalescing::isProfitableToCoalesceToSubRC(unsigned SrcReg, + unsigned DstReg, + MachineBasicBlock *MBB){ + if (!CrossClassJoin) + return false; + + // First let's make sure all uses are in the same MBB. + for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(SrcReg), + RE = mri_->reg_end(); RI != RE; ++RI) { + MachineInstr &MI = *RI; + if (MI.getParent() != MBB) + return false; + } + for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(DstReg), + RE = mri_->reg_end(); RI != RE; ++RI) { + MachineInstr &MI = *RI; + if (MI.getParent() != MBB) + return false; + } + + // Then make sure the intervals are *short*. + LiveInterval &SrcInt = li_->getInterval(SrcReg); + LiveInterval &DstInt = li_->getInterval(DstReg); + unsigned SrcSize = SrcInt.getSize() / InstrSlots::NUM; + unsigned DstSize = DstInt.getSize() / InstrSlots::NUM; + const TargetRegisterClass *RC = mri_->getRegClass(DstReg); + unsigned Threshold = allocatableRCRegs_[RC].count() * 2; + return (SrcSize + DstSize) <= Threshold; +} + + /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg, /// which are the src/dst of the copy instruction CopyMI. This returns true /// if the copy was successfully coalesced away. If it is not currently @@ -810,6 +919,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { return false; // Not coalescable. } + // Should be non-null only when coalescing to a sub-register class. + const TargetRegisterClass *SubRC = NULL; + MachineBasicBlock *CopyMBB = CopyMI->getParent(); unsigned RealDstReg = 0; unsigned RealSrcReg = 0; if (isExtSubReg || isInsSubReg) { @@ -817,11 +929,29 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (SrcIsPhys && isExtSubReg) { // r1024 = EXTRACT_SUBREG EAX, 0 then r1024 is really going to be // coalesced with AX. - SrcReg = tri_->getSubReg(SrcReg, SubIdx); + unsigned DstSubIdx = CopyMI->getOperand(0).getSubReg(); + if (DstSubIdx) { + // r1024<2> = EXTRACT_SUBREG EAX, 2. Then r1024 has already been + // coalesced to a larger register so the subreg indices cancel out. + if (DstSubIdx != SubIdx) { + DOUT << "\t Sub-register indices mismatch.\n"; + return false; // Not coalescable. + } + } else + SrcReg = tri_->getSubReg(SrcReg, SubIdx); SubIdx = 0; } else if (DstIsPhys && isInsSubReg) { // EAX = INSERT_SUBREG EAX, r1024, 0 - DstReg = tri_->getSubReg(DstReg, SubIdx); + unsigned SrcSubIdx = CopyMI->getOperand(2).getSubReg(); + if (SrcSubIdx) { + // EAX = INSERT_SUBREG EAX, r1024<2>, 2 Then r1024 has already been + // coalesced to a larger register so the subreg indices cancel out. + if (SrcSubIdx != SubIdx) { + DOUT << "\t Sub-register indices mismatch.\n"; + return false; // Not coalescable. + } + } else + DstReg = tri_->getSubReg(DstReg, SubIdx); SubIdx = 0; } else if ((DstIsPhys && isExtSubReg) || (SrcIsPhys && isInsSubReg)) { // If this is a extract_subreg where dst is a physical register, e.g. @@ -829,6 +959,11 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // then create and update the actual physical register allocated to RHS. // Ditto for // reg1024 = INSERT_SUBREG r1024, cl, 1 + if (CopyMI->getOperand(1).getSubReg()) { + DOUT << "\tSrc of extract_ / insert_subreg already coalesced with reg" + << " of a super-class.\n"; + return false; // Not coalescable. + } const TargetRegisterClass *RC = mri_->getRegClass(isExtSubReg ? SrcReg : DstReg); if (isExtSubReg) { @@ -858,28 +993,45 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { } SubIdx = 0; } else { - unsigned LargeReg = isExtSubReg ? SrcReg : DstReg; - unsigned SmallReg = isExtSubReg ? DstReg : SrcReg; - unsigned LargeRegSize = - li_->getInterval(LargeReg).getSize() / InstrSlots::NUM; - unsigned SmallRegSize = - li_->getInterval(SmallReg).getSize() / InstrSlots::NUM; - const TargetRegisterClass *RC = mri_->getRegClass(SmallReg); - unsigned Threshold = allocatableRCRegs_[RC].count(); - // Be conservative. If both sides are virtual registers, do not coalesce - // if this will cause a high use density interval to target a smaller set - // of registers. - if (SmallRegSize > Threshold || LargeRegSize > Threshold) { - LiveVariables::VarInfo &svi = lv_->getVarInfo(LargeReg); - LiveVariables::VarInfo &dvi = lv_->getVarInfo(SmallReg); - if ((float)dvi.NumUses / SmallRegSize < - (float)svi.NumUses / LargeRegSize) { - Again = true; // May be possible to coalesce later. - return false; + unsigned OldSubIdx = isExtSubReg ? CopyMI->getOperand(0).getSubReg() + : CopyMI->getOperand(2).getSubReg(); + if (OldSubIdx) { + if (OldSubIdx == SubIdx && + !differingRegisterClasses(SrcReg, DstReg, SubRC)) + // r1024<2> = EXTRACT_SUBREG r1025, 2. Then r1024 has already been + // coalesced to a larger register so the subreg indices cancel out. + // Also check if the other larger register is of the same register + // class as the would be resulting register. + SubIdx = 0; + else { + DOUT << "\t Sub-register indices mismatch.\n"; + return false; // Not coalescable. + } + } + if (SubIdx) { + unsigned LargeReg = isExtSubReg ? SrcReg : DstReg; + unsigned SmallReg = isExtSubReg ? DstReg : SrcReg; + unsigned LargeRegSize = + li_->getInterval(LargeReg).getSize() / InstrSlots::NUM; + unsigned SmallRegSize = + li_->getInterval(SmallReg).getSize() / InstrSlots::NUM; + const TargetRegisterClass *RC = mri_->getRegClass(SmallReg); + unsigned Threshold = allocatableRCRegs_[RC].count(); + // Be conservative. If both sides are virtual registers, do not coalesce + // if this will cause a high use density interval to target a smaller + // set of registers. + if (SmallRegSize > Threshold || LargeRegSize > Threshold) { + if ((float)std::distance(mri_->use_begin(SmallReg), + mri_->use_end()) / SmallRegSize < + (float)std::distance(mri_->use_begin(LargeReg), + mri_->use_end()) / LargeRegSize) { + Again = true; // May be possible to coalesce later. + return false; + } } } } - } else if (differingRegisterClasses(SrcReg, DstReg)) { + } else if (differingRegisterClasses(SrcReg, DstReg, SubRC)) { // FIXME: What if the resul of a EXTRACT_SUBREG is then coalesced // with another? If it's the resulting destination register, then // the subidx must be propagated to uses (but only those defined @@ -887,14 +1039,16 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // register, it should be safe because register is assumed to have // the register class of the super-register. - // If they are not of the same register class, we cannot join them. - DOUT << "\tSrc/Dest are different register classes.\n"; - // Allow the coalescer to try again in case either side gets coalesced to - // a physical register that's compatible with the other side. e.g. - // r1024 = MOV32to32_ r1025 - // but later r1024 is assigned EAX then r1025 may be coalesced with EAX. - Again = true; // May be possible to coalesce later. - return false; + if (!SubRC || !isProfitableToCoalesceToSubRC(SrcReg, DstReg, CopyMBB)) { + // If they are not of the same register class, we cannot join them. + DOUT << "\tSrc/Dest are different register classes.\n"; + // Allow the coalescer to try again in case either side gets coalesced to + // a physical register that's compatible with the other side. e.g. + // r1024 = MOV32to32_ r1025 + // but later r1024 is assigned EAX then r1025 may be coalesced with EAX. + Again = true; // May be possible to coalesce later. + return false; + } } LiveInterval &SrcInt = li_->getInterval(SrcReg); @@ -928,9 +1082,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // do not join them, instead mark the physical register as its allocation // preference. unsigned Length = JoinVInt.getSize() / InstrSlots::NUM; - LiveVariables::VarInfo &vi = lv_->getVarInfo(JoinVReg); if (Length > Threshold && - (((float)vi.NumUses / Length) < (1.0 / Threshold))) { + (((float)std::distance(mri_->use_begin(JoinVReg), + mri_->use_end()) / Length) < (1.0 / Threshold))) { JoinVInt.preference = JoinPReg; ++numAborts; DOUT << "\tMay tie down a physical register, abort!\n"; @@ -994,9 +1148,8 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { SmallSet CopiedValNos; for (LiveInterval::Ranges::const_iterator I = ResSrcInt->ranges.begin(), E = ResSrcInt->ranges.end(); I != E; ++I) { - LiveInterval::const_iterator DstLR = - ResDstInt->FindLiveRangeContaining(I->start); - assert(DstLR != ResDstInt->end() && "Invalid joined interval!"); + const LiveRange *DstLR = ResDstInt->getLiveRangeContaining(I->start); + assert(DstLR && "Invalid joined interval!"); const VNInfo *DstValNo = DstLR->valno; if (CopiedValNos.insert(DstValNo)) { VNInfo *ValNo = RealInt.getNextValue(DstValNo->def, DstValNo->copy, @@ -1014,11 +1167,6 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { for (const unsigned *AS = tri_->getSubRegisters(DstReg); *AS; ++AS) li_->getOrCreateInterval(*AS).MergeInClobberRanges(*ResSrcInt, li_->getVNInfoAllocator()); - } else { - // Merge use info if the destination is a virtual register. - LiveVariables::VarInfo& dVI = lv_->getVarInfo(DstReg); - LiveVariables::VarInfo& sVI = lv_->getVarInfo(SrcReg); - dVI.NumUses += sVI.NumUses; } // If this is a EXTRACT_SUBREG, make sure the result of coalescing is the @@ -1031,6 +1179,13 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { } } + // Coalescing to a virtual register that is of a sub-register class of the + // other. Make sure the resulting register is set to the right register class. + if (SubRC) { + mri_->setRegClass(DstReg, SubRC); + ++numSubJoins; + } + if (NewHeuristic) { // Add all copies that define val# in the source interval into the queue. for (LiveInterval::const_vni_iterator i = ResSrcInt->vni_begin(), @@ -1043,7 +1198,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (CopyMI && JoinedCopies.count(CopyMI) == 0 && tii_->isMoveInstr(*CopyMI, NewSrcReg, NewDstReg)) { - unsigned LoopDepth = loopInfo->getLoopDepth(CopyMI->getParent()); + unsigned LoopDepth = loopInfo->getLoopDepth(CopyMBB); JoinQueue->push(CopyRec(CopyMI, LoopDepth, isBackEdgeCopy(CopyMI, DstReg))); } @@ -1076,7 +1231,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // by the copy is being defined by an IMPLICIT_DEF which defines a zero // length interval. Remove the val#. unsigned CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI)); - LiveInterval::iterator LR = ResDstInt->FindLiveRangeContaining(CopyIdx); + const LiveRange *LR = ResDstInt->getLiveRangeContaining(CopyIdx); VNInfo *ImpVal = LR->valno; assert(ImpVal->def == CopyIdx); unsigned NextDef = LR->end; @@ -1228,7 +1383,20 @@ bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){ // Copy from the RHS? if (!RangeIsDefinedByCopyFromReg(LHS, LHSIt, RHS.reg)) return false; // Nope, bail out. - + + if (LHSIt->contains(RHSIt->valno->def)) + // Here is an interesting situation: + // BB1: + // vr1025 = copy vr1024 + // .. + // BB2: + // vr1024 = op + // = vr1025 + // Even though vr1025 is copied from vr1024, it's not safe to + // coalesced them since live range of vr1025 intersects the + // def of vr1024. This happens because vr1025 is assigned the + // value of the previous iteration of vr1024. + return false; EliminatedLHSVals.push_back(LHSIt->valno); } @@ -1254,6 +1422,19 @@ bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){ // Otherwise, if this is a copy from the RHS, mark it as being merged // in. if (RangeIsDefinedByCopyFromReg(LHS, LHSIt, RHS.reg)) { + if (LHSIt->contains(RHSIt->valno->def)) + // Here is an interesting situation: + // BB1: + // vr1025 = copy vr1024 + // .. + // BB2: + // vr1024 = op + // = vr1025 + // Even though vr1025 is copied from vr1024, it's not safe to + // coalesced them since live range of vr1025 intersects the + // def of vr1024. This happens because vr1025 is assigned the + // value of the previous iteration of vr1024. + return false; EliminatedLHSVals.push_back(LHSIt->valno); // We know this entire LHS live range is okay, so skip it now. @@ -1748,9 +1929,13 @@ void SimpleRegisterCoalescing::joinIntervals() { } /// Return true if the two specified registers belong to different register -/// classes. The registers may be either phys or virt regs. -bool SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA, - unsigned RegB) const { +/// classes. The registers may be either phys or virt regs. In the +/// case where both registers are virtual registers, it would also returns +/// true by reference the RegB register class in SubRC if it is a subset of +/// RegA's register class. +bool +SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA, unsigned RegB, + const TargetRegisterClass *&SubRC) const { // Get the register classes for the first reg. if (TargetRegisterInfo::isPhysicalRegister(RegA)) { @@ -1760,11 +1945,15 @@ bool SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA, } // Compare against the regclass for the second reg. - const TargetRegisterClass *RegClass = mri_->getRegClass(RegA); - if (TargetRegisterInfo::isVirtualRegister(RegB)) - return RegClass != mri_->getRegClass(RegB); - else - return !RegClass->contains(RegB); + const TargetRegisterClass *RegClassA = mri_->getRegClass(RegA); + if (TargetRegisterInfo::isVirtualRegister(RegB)) { + const TargetRegisterClass *RegClassB = mri_->getRegClass(RegB); + if (RegClassA == RegClassB) + return false; + SubRC = (RegClassA->hasSubClass(RegClassB)) ? RegClassB : NULL; + return true; + } + return !RegClassA->contains(RegB); } /// lastRegisterUse - Returns the last use of the specific register between @@ -1858,7 +2047,7 @@ SimpleRegisterCoalescing::TurnCopyIntoImpDef(MachineBasicBlock::iterator &I, if (!li_->hasInterval(DstReg)) return false; LiveInterval &DstInt = li_->getInterval(DstReg); - LiveInterval::iterator DstLR = DstInt.FindLiveRangeContaining(CopyIdx); + const LiveRange *DstLR = DstInt.getLiveRangeContaining(CopyIdx); DstInt.removeValNo(DstLR->valno); CopyMI->setDesc(tii_->get(TargetInstrInfo::IMPLICIT_DEF)); for (int i = CopyMI->getNumOperands() - 1, e = 0; i > e; --i) @@ -1874,7 +2063,6 @@ SimpleRegisterCoalescing::TurnCopyIntoImpDef(MachineBasicBlock::iterator &I, assert(DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF); li_->RemoveMachineInstrFromMaps(DefMI); DefMI->eraseFromParent(); - ++numPeep; } } ++I; @@ -1889,7 +2077,6 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { tri_ = tm_->getRegisterInfo(); tii_ = tm_->getInstrInfo(); li_ = &getAnalysis(); - lv_ = &getAnalysis(); loopInfo = &getAnalysis(); DOUT << "********** SIMPLE REGISTER COALESCING **********\n" @@ -1910,22 +2097,6 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { I->second.print(DOUT, tri_); DOUT << "\n"; } - - // Delete all coalesced copies. - for (SmallPtrSet::iterator I = JoinedCopies.begin(), - E = JoinedCopies.end(); I != E; ++I) { - MachineInstr *CopyMI = *I; - unsigned SrcReg, DstReg; - tii_->isMoveInstr(*CopyMI, SrcReg, DstReg); - if (CopyMI->registerDefIsDead(DstReg)) { - LiveInterval &li = li_->getInterval(DstReg); - ShortenDeadCopySrcLiveRange(li, CopyMI); - ShortenDeadCopyLiveRange(li, CopyMI); - } - li_->RemoveMachineInstrFromMaps(*I); - (*I)->eraseFromParent(); - ++numPeep; - } } // Perform a final pass over the instructions and compute spill weights @@ -1937,23 +2108,43 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { for (MachineBasicBlock::iterator mii = mbb->begin(), mie = mbb->end(); mii != mie; ) { - // if the move will be an identity move delete it - unsigned srcReg, dstReg; - bool isMove = tii_->isMoveInstr(*mii, srcReg, dstReg); - if (isMove && srcReg == dstReg) { - if (li_->hasInterval(srcReg)) { - LiveInterval &RegInt = li_->getInterval(srcReg); + MachineInstr *MI = mii; + unsigned SrcReg, DstReg; + if (JoinedCopies.count(MI)) { + // Delete all coalesced copies. + if (!tii_->isMoveInstr(*MI, SrcReg, DstReg)) { + assert((MI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG || + MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG) && + "Unrecognized copy instruction"); + DstReg = MI->getOperand(0).getReg(); + } + if (MI->registerDefIsDead(DstReg)) { + LiveInterval &li = li_->getInterval(DstReg); + if (!ShortenDeadCopySrcLiveRange(li, MI)) + ShortenDeadCopyLiveRange(li, MI); + } + li_->RemoveMachineInstrFromMaps(MI); + mii = mbbi->erase(mii); + ++numPeep; + continue; + } + + // If the move will be an identity move delete it + bool isMove = tii_->isMoveInstr(*mii, SrcReg, DstReg); + if (isMove && SrcReg == DstReg) { + if (li_->hasInterval(SrcReg)) { + LiveInterval &RegInt = li_->getInterval(SrcReg); // If def of this move instruction is dead, remove its live range // from the dstination register's live interval. - if (mii->registerDefIsDead(dstReg)) { - ShortenDeadCopySrcLiveRange(RegInt, mii); - ShortenDeadCopyLiveRange(RegInt, mii); + if (mii->registerDefIsDead(DstReg)) { + if (!ShortenDeadCopySrcLiveRange(RegInt, mii)) + ShortenDeadCopyLiveRange(RegInt, mii); } } li_->RemoveMachineInstrFromMaps(mii); mii = mbbi->erase(mii); ++numPeep; - } else if (!isMove || !TurnCopyIntoImpDef(mii, mbb, dstReg, srcReg)) { + } else if (!isMove || !TurnCopyIntoImpDef(mii, mbb, DstReg, SrcReg)) { SmallSet UniqueUses; for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) { const MachineOperand &mop = mii->getOperand(i);