X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FSimpleRegisterCoalescing.h;h=9e55c220034bca93ffcfb9fb53f849f238c29535;hb=58b1ac76d470eb5faa7e98feae97c4906d4d146e;hp=3a65a9f4dd7095b373745d31a2a6cf13c91c52fd;hpb=e00f5de361bcc69d05e07303460e6849668b7169;p=oota-llvm.git

diff --git a/lib/CodeGen/SimpleRegisterCoalescing.h b/lib/CodeGen/SimpleRegisterCoalescing.h
index 3a65a9f4dd7..9e55c220034 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.h
+++ b/lib/CodeGen/SimpleRegisterCoalescing.h
@@ -15,11 +15,9 @@
 #define LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
 
 #include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
 #include "llvm/CodeGen/RegisterCoalescer.h"
 #include "llvm/ADT/BitVector.h"
-#include "llvm/ADT/IndexedMap.h"
 #include <queue>
 
 namespace llvm {
@@ -96,9 +94,17 @@ namespace llvm {
     ///
     SmallPtrSet<MachineInstr*, 32> JoinedCopies;
 
+    /// ReMatCopies - Keep track of copies eliminated due to remat.
+    ///
+    SmallPtrSet<MachineInstr*, 32> ReMatCopies;
+
+    /// ReMatDefs - Keep track of definition instructions which have
+    /// been remat'ed.
+    SmallPtrSet<MachineInstr*, 8> ReMatDefs;
+
   public:
     static char ID; // Pass identifcation, replacement for typeid
-    SimpleRegisterCoalescing() : MachineFunctionPass((intptr_t)&ID) {}
+    SimpleRegisterCoalescing() : MachineFunctionPass(&ID) {}
 
     struct InstrSlots {
       enum {
@@ -126,7 +132,8 @@ namespace llvm {
     unsigned getRepIntervalSize(unsigned Reg) {
       if (!li_->hasInterval(Reg))
         return 0;
-      return li_->getInterval(Reg).getSize();
+      return li_->getApproximateInstructionCount(li_->getInterval(Reg)) *
+             LiveIntervals::InstrSlots::NUM;
     }
 
     /// print - Implement the dump method.
@@ -166,12 +173,8 @@ namespace llvm {
     bool SimpleJoin(LiveInterval &LHS, LiveInterval &RHS);
     
     /// Return true if the two specified registers belong to different register
-    /// classes.  The registers may be either phys or virt regs. In the
-    /// case where both registers are virtual registers, it would also returns
-    /// true by reference the RegB register class in SubRC if it is a subset of
-    /// RegA's register class.
-    bool differingRegisterClasses(unsigned RegA, unsigned RegB,
-                                  const TargetRegisterClass *&SubRC) const;
+    /// classes.  The registers may be either phys or virt regs.
+    bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
 
 
     /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy. If
@@ -193,6 +196,18 @@ namespace llvm {
     bool RemoveCopyByCommutingDef(LiveInterval &IntA, LiveInterval &IntB,
                                   MachineInstr *CopyMI);
 
+    /// TrimLiveIntervalToLastUse - If there is a last use in the same basic
+    /// block as the copy instruction, trim the ive interval to the last use
+    /// and return true.
+    bool TrimLiveIntervalToLastUse(unsigned CopyIdx,
+                                   MachineBasicBlock *CopyMBB,
+                                   LiveInterval &li, const LiveRange *LR);
+
+    /// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial
+    /// computation, replace the copy by rematerialize the definition.
+    bool ReMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg,
+                                 MachineInstr *CopyMI);
+
     /// TurnCopyIntoImpDef - If source of the specified copy is an implicit def,
     /// turn the copy into an implicit def.
     bool TurnCopyIntoImpDef(MachineBasicBlock::iterator &I,
@@ -209,11 +224,29 @@ namespace llvm {
     /// identity copies so they will be removed.
     void RemoveCopiesFromValNo(LiveInterval &li, VNInfo *VNI);
 
-    /// isProfitableToCoalesceToSubRC - Given that register class of DstReg is
-    /// a subset of the register class of SrcReg, return true if it's profitable
-    /// to coalesce the two registers.
-    bool isProfitableToCoalesceToSubRC(unsigned SrcReg, unsigned DstReg,
-                                       MachineBasicBlock *MBB);
+    /// isWinToJoinCrossClass - Return true if it's profitable to coalesce
+    /// two virtual registers from different register classes.
+    bool isWinToJoinCrossClass(unsigned LargeReg, unsigned SmallReg,
+                               unsigned Threshold);
+
+    /// HasIncompatibleSubRegDefUse - If we are trying to coalesce a virtual
+    /// register with a physical register, check if any of the virtual register
+    /// operand is a sub-register use or def. If so, make sure it won't result
+    /// in an illegal extract_subreg or insert_subreg instruction.
+    bool HasIncompatibleSubRegDefUse(MachineInstr *CopyMI,
+                                     unsigned VirtReg, unsigned PhysReg);
+
+    /// CanJoinExtractSubRegToPhysReg - Return true if it's possible to coalesce
+    /// an extract_subreg where dst is a physical register, e.g.
+    /// cl = EXTRACT_SUBREG reg1024, 1
+    bool CanJoinExtractSubRegToPhysReg(unsigned DstReg, unsigned SrcReg,
+                                       unsigned SubIdx, unsigned &RealDstReg);
+
+    /// CanJoinInsertSubRegToPhysReg - Return true if it's possible to coalesce
+    /// an insert_subreg where src is a physical register, e.g.
+    /// reg1024 = INSERT_SUBREG reg1024, c1, 0
+    bool CanJoinInsertSubRegToPhysReg(unsigned DstReg, unsigned SrcReg,
+                                      unsigned SubIdx, unsigned &RealDstReg);
 
     /// RangeIsDefinedByCopyFromReg - Return true if the specified live range of
     /// the specified live interval is defined by a copy from the specified
@@ -250,6 +283,11 @@ namespace llvm {
     /// live range is dead. Return true if live interval is removed.
     bool ShortenDeadCopySrcLiveRange(LiveInterval &li, MachineInstr *CopyMI);
 
+    /// RemoveDeadDef - If a def of a live interval is now determined dead,
+    /// remove the val# it defines. If the live interval becomes empty, remove
+    /// it as well.
+    bool RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI);
+
     /// lastRegisterUse - Returns the last use of the specific register between
     /// cycles Start and End or NULL if there are no uses.
     MachineOperand *lastRegisterUse(unsigned Start, unsigned End, unsigned Reg,