X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FStrongPHIElimination.cpp;h=5d7bc23694bf9100f033c606e0b892690ba79bf6;hb=a29c13086a3add78a3a79f744573fe09eaa9dc88;hp=5b80b94f3fcd05a80037eb1642900b1b3bdb5b32;hpb=a6b1926531b78f5fa45503aebea30cdb616114b7;p=oota-llvm.git diff --git a/lib/CodeGen/StrongPHIElimination.cpp b/lib/CodeGen/StrongPHIElimination.cpp index 5b80b94f3fc..5d7bc23694b 100644 --- a/lib/CodeGen/StrongPHIElimination.cpp +++ b/lib/CodeGen/StrongPHIElimination.cpp @@ -21,28 +21,30 @@ #define DEBUG_TYPE "strongphielim" #include "llvm/CodeGen/Passes.h" -#include "llvm/CodeGen/LiveVariables.h" +#include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/RegisterCoalescer.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/ADT/DepthFirstIterator.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Compiler.h" +#include "llvm/Support/Debug.h" using namespace llvm; - namespace { struct VISIBILITY_HIDDEN StrongPHIElimination : public MachineFunctionPass { static char ID; // Pass identification, replacement for typeid - StrongPHIElimination() : MachineFunctionPass((intptr_t)&ID) {} + StrongPHIElimination() : MachineFunctionPass(&ID) {} // Waiting stores, for each MBB, the set of copies that need to // be inserted into that MBB DenseMap > Waiting; + std::multimap > Waiting; // Stacks holds the renaming stack for each register std::map > Stacks; @@ -51,9 +53,14 @@ namespace { // used as operands to another another PHI node std::set UsedByAnother; - // RenameSets are the sets of operands to a PHI (the defining instruction - // of the key) that can be renamed without copies - std::map > RenameSets; + // RenameSets are the is a map from a PHI-defined register + // to the input registers to be coalesced along with the + // predecessor block for those input registers. + std::map > RenameSets; + + // PhiValueNumber holds the ID numbers of the VNs for each phi that we're + // eliminating, indexed by the register defined by that phi. + std::map PhiValueNumber; // Store the DFS-in number of each block DenseMap preorder; @@ -65,7 +72,11 @@ namespace { virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired(); - AU.addRequired(); + AU.addRequired(); + + // TODO: Actually make this true. + AU.addPreserved(); + AU.addPreserved(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -121,22 +132,26 @@ namespace { void computeDFS(MachineFunction& MF); void processBlock(MachineBasicBlock* MBB); - std::vector computeDomForest(std::set& instrs, + std::vector computeDomForest( + std::map& instrs, MachineRegisterInfo& MRI); void processPHIUnion(MachineInstr* Inst, - std::set& PHIUnion, + std::map& PHIUnion, std::vector& DF, std::vector >& locals); void ScheduleCopies(MachineBasicBlock* MBB, std::set& pushed); - void InsertCopies(MachineBasicBlock* MBB, std::set& v); + void InsertCopies(MachineDomTreeNode* MBB, + SmallPtrSet& v); + bool mergeLiveIntervals(unsigned primary, unsigned secondary); }; - - char StrongPHIElimination::ID = 0; - RegisterPass X("strong-phi-node-elimination", - "Eliminate PHI nodes for register allocation, intelligently"); } -const PassInfo *llvm::StrongPHIEliminationID = X.getPassInfo(); +char StrongPHIElimination::ID = 0; +static RegisterPass +X("strong-phi-node-elimination", + "Eliminate PHI nodes for register allocation, intelligently"); + +const PassInfo *const llvm::StrongPHIEliminationID = &X; /// computeDFS - Computes the DFS-in and DFS-out numbers of the dominator tree /// of the given MachineFunction. These numbers are then used in other parts @@ -164,7 +179,7 @@ void StrongPHIElimination::computeDFS(MachineFunction& MF) { } bool inserted = false; - for (MachineDomTreeNode::iterator I = node->begin(), E = node->end(); + for (MachineDomTreeNode::iterator I = currNode->begin(), E = currNode->end(); I != E; ++I) if (!frontier.count(*I) && !visited.count(*I)) { worklist.push_back(*I); @@ -182,6 +197,8 @@ void StrongPHIElimination::computeDFS(MachineFunction& MF) { } } +namespace { + /// PreorderSorter - a helper class that is used to sort registers /// according to the preorder number of their defining blocks class PreorderSorter { @@ -209,10 +226,13 @@ public: } }; +} + /// computeDomForest - compute the subforest of the DomTree corresponding /// to the defining blocks of the registers in question std::vector -StrongPHIElimination::computeDomForest(std::set& regs, +StrongPHIElimination::computeDomForest( + std::map& regs, MachineRegisterInfo& MRI) { // Begin by creating a virtual root node, since the actual results // may well be a forest. Assume this node has maximum DFS-out number. @@ -222,9 +242,9 @@ StrongPHIElimination::computeDomForest(std::set& regs, // Populate a worklist with the registers std::vector worklist; worklist.reserve(regs.size()); - for (std::set::iterator I = regs.begin(), E = regs.end(); - I != E; ++I) - worklist.push_back(*I); + for (std::map::iterator I = regs.begin(), + E = regs.end(); I != E; ++I) + worklist.push_back(I->first); // Sort the registers by the DFS-in number of their defining block PreorderSorter PS(preorder, MRI); @@ -269,35 +289,23 @@ StrongPHIElimination::computeDomForest(std::set& regs, return ret; } -/// isLiveIn - helper method that determines, from a VarInfo, if a register +/// isLiveIn - helper method that determines, from a regno, if a register /// is live into a block static bool isLiveIn(unsigned r, MachineBasicBlock* MBB, - MachineRegisterInfo& MRI, LiveVariables& LV) { - LiveVariables::VarInfo V = LV.getVarInfo(r); - if (V.AliveBlocks.test(MBB->getNumber())) - return true; - - if (MRI.getVRegDef(r)->getParent() != MBB && - V.UsedBlocks.test(MBB->getNumber())) - return true; - - return false; + LiveIntervals& LI) { + LiveInterval& I = LI.getOrCreateInterval(r); + unsigned idx = LI.getMBBStartIdx(MBB); + return I.liveAt(idx); } -/// isLiveOut - help method that determines, from a VarInfo, if a register is +/// isLiveOut - help method that determines, from a regno, if a register is /// live out of a block. static bool isLiveOut(unsigned r, MachineBasicBlock* MBB, - MachineRegisterInfo& MRI, LiveVariables& LV) { - LiveVariables::VarInfo& V = LV.getVarInfo(r); - if (MBB == MRI.getVRegDef(r)->getParent() || - V.UsedBlocks.test(MBB->getNumber())) { - for (std::vector::iterator I = V.Kills.begin(), - E = V.Kills.end(); I != E; ++I) - if ((*I)->getParent() == MBB) - return false; - - return true; - } + LiveIntervals& LI) { + for (MachineBasicBlock::succ_iterator PI = MBB->succ_begin(), + E = MBB->succ_end(); PI != E; ++PI) + if (isLiveIn(r, *PI, LI)) + return true; return false; } @@ -307,7 +315,7 @@ static bool isLiveOut(unsigned r, MachineBasicBlock* MBB, /// registers. 0 - defined in the same block, 1 - first properly dominates /// second, 2 - second properly dominates first static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan, - LiveVariables& LV, unsigned mode) { + LiveIntervals& LV, unsigned mode) { MachineInstr* def = 0; MachineInstr* kill = 0; @@ -351,10 +359,10 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan, break; } // Store KillInsts if they match up with the definition - } else if (LV.KillsRegister(curr, a)) { + } else if (curr->killsRegister(a)) { if (def == MRI->getVRegDef(a)) { kill = curr; - } else if (LV.KillsRegister(curr, b)) { + } else if (curr->killsRegister(b)) { if (def == MRI->getVRegDef(b)) { kill = curr; } @@ -373,7 +381,7 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan, break; } // Save KillInsts of First - } else if (LV.KillsRegister(curr, a)) { + } else if (curr->killsRegister(a)) { kill = curr; } // Symmetric with the above @@ -386,7 +394,7 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan, interference = false; break; } - } else if (LV.KillsRegister(curr, b)) { + } else if (curr->killsRegister(b)) { kill = curr; } } @@ -400,7 +408,7 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan, /// copies. This method is responsible for determining which operands receive /// which treatment. void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) { - LiveVariables& LV = getAnalysis(); + LiveIntervals& LI = getAnalysis(); MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo(); // Holds names that have been added to a set in any PHI within this block @@ -411,17 +419,39 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) { MachineBasicBlock::iterator P = MBB->begin(); while (P != MBB->end() && P->getOpcode() == TargetInstrInfo::PHI) { unsigned DestReg = P->getOperand(0).getReg(); + + // Don't both doing PHI elimination for dead PHI's. + if (P->registerDefIsDead(DestReg)) { + ++P; + continue; + } + + LiveInterval& PI = LI.getOrCreateInterval(DestReg); + unsigned pIdx = LI.getDefIndex(LI.getInstructionIndex(P)); + VNInfo* PVN = PI.getLiveRangeContaining(pIdx)->valno; + PhiValueNumber.insert(std::make_pair(DestReg, PVN->id)); // PHIUnion is the set of incoming registers to the PHI node that // are going to be renames rather than having copies inserted. This set // is refinded over the course of this function. UnionedBlocks is the set // of corresponding MBBs. - std::set PHIUnion; - std::set UnionedBlocks; + std::map PHIUnion; + SmallPtrSet UnionedBlocks; // Iterate over the operands of the PHI node for (int i = P->getNumOperands() - 1; i >= 2; i-=2) { unsigned SrcReg = P->getOperand(i-1).getReg(); + + // Don't need to try to coalesce a register with itself. + if (SrcReg == DestReg) { + ProcessedNames.insert(SrcReg); + continue; + } + + // We don't need to insert copies for implicit_defs. + MachineInstr* DefMI = MRI.getVRegDef(SrcReg); + if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) + ProcessedNames.insert(SrcReg); // Check for trivial interferences via liveness information, allowing us // to avoid extra work later. Any registers that interfere cannot both @@ -435,12 +465,12 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) { // in this block OR // 5) if any two operands are defined in the same block, insert copies // for one of them - if (isLiveIn(SrcReg, P->getParent(), MRI, LV) || + if (isLiveIn(SrcReg, P->getParent(), LI) || isLiveOut(P->getOperand(0).getReg(), - MRI.getVRegDef(SrcReg)->getParent(), MRI, LV) || + MRI.getVRegDef(SrcReg)->getParent(), LI) || ( MRI.getVRegDef(SrcReg)->getOpcode() == TargetInstrInfo::PHI && isLiveIn(P->getOperand(0).getReg(), - MRI.getVRegDef(SrcReg)->getParent(), MRI, LV) ) || + MRI.getVRegDef(SrcReg)->getParent(), LI) ) || ProcessedNames.count(SrcReg) || UnionedBlocks.count(MRI.getVRegDef(SrcReg)->getParent())) { @@ -450,7 +480,7 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) { UsedByAnother.insert(SrcReg); } else { // Otherwise, add it to the renaming set - PHIUnion.insert(SrcReg); + PHIUnion.insert(std::make_pair(SrcReg,P->getOperand(i).getMBB())); UnionedBlocks.insert(MRI.getVRegDef(SrcReg)->getParent()); } } @@ -467,8 +497,17 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) { std::vector > localInterferences; processPHIUnion(P, PHIUnion, DF, localInterferences); + // If one of the inputs is defined in the same block as the current PHI + // then we need to check for a local interference between that input and + // the PHI. + for (std::map::iterator I = PHIUnion.begin(), + E = PHIUnion.end(); I != E; ++I) + if (MRI.getVRegDef(I->first)->getParent() == P->getParent()) + localInterferences.push_back(std::make_pair(I->first, + P->getOperand(0).getReg())); + // The dominator forest walk may have returned some register pairs whose - // interference cannot be determines from dominator analysis. We now + // interference cannot be determined from dominator analysis. We now // examine these pairs for local interferences. for (std::vector >::iterator I = localInterferences.begin(), E = localInterferences.end(); I != E; ++I) { @@ -494,7 +533,7 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) { } // If there's an interference, we need to insert copies - if (interferes(p.first, p.second, scan, LV, mode)) { + if (interferes(p.first, p.second, scan, LI, mode)) { // Insert copies for First for (int i = P->getNumOperands() - 1; i >= 2; i-=2) { if (P->getOperand(i-1).getReg() == p.first) { @@ -511,23 +550,31 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) { } } - // Add the renaming set for this PHI node to our overal renaming information + // Add the renaming set for this PHI node to our overall renaming information + for (std::map::iterator QI = PHIUnion.begin(), + QE = PHIUnion.end(); QI != QE; ++QI) { + DOUT << "Adding Renaming: " << QI->first << " -> " + << P->getOperand(0).getReg() << "\n"; + } + RenameSets.insert(std::make_pair(P->getOperand(0).getReg(), PHIUnion)); // Remember which registers are already renamed, so that we don't try to // rename them for another PHI node in this block - ProcessedNames.insert(PHIUnion.begin(), PHIUnion.end()); + for (std::map::iterator I = PHIUnion.begin(), + E = PHIUnion.end(); I != E; ++I) + ProcessedNames.insert(I->first); ++P; } } -/// processPHIUnion - Take a set of candidate registers to be coallesced when +/// processPHIUnion - Take a set of candidate registers to be coalesced when /// decomposing the PHI instruction. Use the DominanceForest to remove the ones /// that are known to interfere, and flag others that need to be checked for /// local interferences. void StrongPHIElimination::processPHIUnion(MachineInstr* Inst, - std::set& PHIUnion, + std::map& PHIUnion, std::vector& DF, std::vector >& locals) { @@ -537,7 +584,7 @@ void StrongPHIElimination::processPHIUnion(MachineInstr* Inst, // Code is still in SSA form, so we can use MRI::getVRegDef() MachineRegisterInfo& MRI = Inst->getParent()->getParent()->getRegInfo(); - LiveVariables& LV = getAnalysis(); + LiveIntervals& LI = getAnalysis(); unsigned DestReg = Inst->getOperand(0).getReg(); // DF walk on the DomForest @@ -557,7 +604,7 @@ void StrongPHIElimination::processPHIUnion(MachineInstr* Inst, // for the child or the parent. In the interest of simplicity, we're // just always choosing the parent. if (isLiveOut(DFNode->getReg(), - MRI.getVRegDef(child->getReg())->getParent(), MRI, LV)) { + MRI.getVRegDef(child->getReg())->getParent(), LI)) { // Insert copies for parent for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) { if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) { @@ -574,8 +621,7 @@ void StrongPHIElimination::processPHIUnion(MachineInstr* Inst, // If a node is live-in to the defining block of one of its children, but // not live-out, then we need to scan that block for local interferences. } else if (isLiveIn(DFNode->getReg(), - MRI.getVRegDef(child->getReg())->getParent(), - MRI, LV) || + MRI.getVRegDef(child->getReg())->getParent(), LI) || MRI.getVRegDef(DFNode->getReg())->getParent() == MRI.getVRegDef(child->getReg())->getParent()) { // Add (p, c) to possible local interferences @@ -600,44 +646,47 @@ void StrongPHIElimination::processPHIUnion(MachineInstr* Inst, /// of Static Single Assignment Form" by Briggs, et al. void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB, std::set& pushed) { - // FIXME: This function needs to update LiveVariables - std::map& copy_set= Waiting[MBB]; + // FIXME: This function needs to update LiveIntervals + std::multimap& copy_set= Waiting[MBB]; - std::map worklist; + std::multimap worklist; std::map map; // Setup worklist of initial copies - for (std::map::iterator I = copy_set.begin(), + for (std::multimap::iterator I = copy_set.begin(), E = copy_set.end(); I != E; ) { map.insert(std::make_pair(I->first, I->first)); map.insert(std::make_pair(I->second, I->second)); - if (!UsedByAnother.count(I->first)) { + if (!UsedByAnother.count(I->second)) { worklist.insert(*I); // Avoid iterator invalidation - unsigned first = I->first; + std::multimap::iterator OI = I; ++I; - copy_set.erase(first); + copy_set.erase(OI); } else { ++I; } } - LiveVariables& LV = getAnalysis(); + LiveIntervals& LI = getAnalysis(); MachineFunction* MF = MBB->getParent(); MachineRegisterInfo& MRI = MF->getRegInfo(); const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); + SmallVector, 4> InsertedPHIDests; + // Iterate over the worklist, inserting copies while (!worklist.empty() || !copy_set.empty()) { while (!worklist.empty()) { - std::pair curr = *worklist.begin(); - worklist.erase(curr.first); + std::multimap::iterator WI = worklist.begin(); + std::pair curr = *WI; + worklist.erase(WI); const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first); - if (isLiveOut(curr.second, MBB, MRI, LV)) { + if (isLiveOut(curr.second, MBB, LI)) { // Create a temporary unsigned t = MF->getRegInfo().createVirtualRegister(RC); @@ -647,28 +696,41 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB, TII->copyRegToReg(*PI->getParent(), PI, t, curr.second, RC, RC); + DOUT << "Inserted copy from " << curr.second << " to " << t << "\n"; + // Push temporary on Stacks Stacks[curr.second].push_back(t); // Insert curr.second in pushed pushed.insert(curr.second); + + // Create a live interval for this temporary + InsertedPHIDests.push_back(std::make_pair(t, --PI)); } // Insert copy from map[curr.first] to curr.second TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), curr.second, map[curr.first], RC, RC); map[curr.first] = curr.second; + DOUT << "Inserted copy from " << curr.first << " to " + << curr.second << "\n"; + + // Push this copy onto InsertedPHICopies so we can + // update LiveIntervals with it. + MachineBasicBlock::iterator MI = MBB->getFirstTerminator(); + InsertedPHIDests.push_back(std::make_pair(curr.second, --MI)); // If curr.first is a destination in copy_set... - for (std::map::iterator I = copy_set.begin(), + for (std::multimap::iterator I = copy_set.begin(), E = copy_set.end(); I != E; ) if (curr.first == I->second) { std::pair temp = *I; + worklist.insert(temp); // Avoid iterator invalidation + std::multimap::iterator OI = I; ++I; - copy_set.erase(temp.first); - worklist.insert(temp); + copy_set.erase(OI); break; } else { @@ -677,46 +739,114 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB, } if (!copy_set.empty()) { - std::pair curr = *copy_set.begin(); - copy_set.erase(curr.first); + std::multimap::iterator CI = copy_set.begin(); + std::pair curr = *CI; + worklist.insert(curr); + copy_set.erase(CI); - const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first); + LiveInterval& I = LI.getInterval(curr.second); + MachineBasicBlock::iterator term = MBB->getFirstTerminator(); + unsigned endIdx = 0; + if (term != MBB->end()) + endIdx = LI.getInstructionIndex(term); + else + endIdx = LI.getMBBEndIdx(MBB); - // Insert a copy from dest to a new temporary t at the end of b - unsigned t = MF->getRegInfo().createVirtualRegister(RC); - TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), t, - curr.second, RC, RC); - map[curr.second] = t; + if (I.liveAt(endIdx)) { + const TargetRegisterClass *RC = + MF->getRegInfo().getRegClass(curr.first); + + // Insert a copy from dest to a new temporary t at the end of b + unsigned t = MF->getRegInfo().createVirtualRegister(RC); + TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), t, + curr.second, RC, RC); + map[curr.second] = t; + + MachineBasicBlock::iterator TI = MBB->getFirstTerminator(); + InsertedPHIDests.push_back(std::make_pair(t, --TI)); + } + } + } + + // Renumber the instructions so that we can perform the index computations + // needed to create new live intervals. + LI.computeNumbering(); + + // For copies that we inserted at the ends of predecessors, we construct + // live intervals. This is pretty easy, since we know that the destination + // register cannot have be in live at that point previously. We just have + // to make sure that, for registers that serve as inputs to more than one + // PHI, we don't create multiple overlapping live intervals. + std::set RegHandled; + for (SmallVector, 4>::iterator I = + InsertedPHIDests.begin(), E = InsertedPHIDests.end(); I != E; ++I) { + if (RegHandled.insert(I->first).second) { + LiveInterval& Int = LI.getOrCreateInterval(I->first); + unsigned instrIdx = LI.getInstructionIndex(I->second); + if (Int.liveAt(LiveIntervals::getDefIndex(instrIdx))) + Int.removeRange(LiveIntervals::getDefIndex(instrIdx), + LI.getMBBEndIdx(I->second->getParent())+1, + true); - worklist.insert(curr); + LiveRange R = LI.addLiveRangeToEndOfBlock(I->first, I->second); + R.valno->copy = I->second; + R.valno->def = + LiveIntervals::getDefIndex(LI.getInstructionIndex(I->second)); } } } /// InsertCopies - insert copies into MBB and all of its successors -void StrongPHIElimination::InsertCopies(MachineBasicBlock* MBB, - std::set& visited) { +void StrongPHIElimination::InsertCopies(MachineDomTreeNode* MDTN, + SmallPtrSet& visited) { + MachineBasicBlock* MBB = MDTN->getBlock(); visited.insert(MBB); std::set pushed; + LiveIntervals& LI = getAnalysis(); // Rewrite register uses from Stacks for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); - I != E; ++I) + I != E; ++I) { + if (I->getOpcode() == TargetInstrInfo::PHI) + continue; + for (unsigned i = 0; i < I->getNumOperands(); ++i) - if (I->getOperand(i).isRegister() && + if (I->getOperand(i).isReg() && Stacks[I->getOperand(i).getReg()].size()) { + // Remove the live range for the old vreg. + LiveInterval& OldInt = LI.getInterval(I->getOperand(i).getReg()); + LiveInterval::iterator OldLR = OldInt.FindLiveRangeContaining( + LiveIntervals::getUseIndex(LI.getInstructionIndex(I))); + if (OldLR != OldInt.end()) + OldInt.removeRange(*OldLR, true); + + // Change the register I->getOperand(i).setReg(Stacks[I->getOperand(i).getReg()].back()); + + // Add a live range for the new vreg + LiveInterval& Int = LI.getInterval(I->getOperand(i).getReg()); + VNInfo* FirstVN = *Int.vni_begin(); + FirstVN->hasPHIKill = false; + if (I->getOperand(i).isKill()) + FirstVN->kills.push_back( + LiveIntervals::getUseIndex(LI.getInstructionIndex(I))); + + LiveRange LR (LI.getMBBStartIdx(I->getParent()), + LiveIntervals::getUseIndex(LI.getInstructionIndex(I))+1, + FirstVN); + + Int.addRange(LR); } + } // Schedule the copies for this block ScheduleCopies(MBB, pushed); - // Recur to our successors - for (GraphTraits::ChildIteratorType I = - GraphTraits::child_begin(MBB), E = - GraphTraits::child_end(MBB); I != E; ++I) - if (!visited.count(*I)) + // Recur down the dominator tree. + for (MachineDomTreeNode::iterator I = MDTN->begin(), + E = MDTN->end(); I != E; ++I) + if (!visited.count((*I)->getBlock())) InsertCopies(*I, visited); // As we exit this block, pop the names we pushed while processing it @@ -725,7 +855,55 @@ void StrongPHIElimination::InsertCopies(MachineBasicBlock* MBB, Stacks[*I].pop_back(); } +bool StrongPHIElimination::mergeLiveIntervals(unsigned primary, + unsigned secondary) { + + LiveIntervals& LI = getAnalysis(); + LiveInterval& LHS = LI.getOrCreateInterval(primary); + LiveInterval& RHS = LI.getOrCreateInterval(secondary); + + LI.computeNumbering(); + + DenseMap VNMap; + for (LiveInterval::iterator I = RHS.begin(), E = RHS.end(); I != E; ++I) { + LiveRange R = *I; + + unsigned Start = R.start; + unsigned End = R.end; + if (LHS.getLiveRangeContaining(Start)) + return false; + + if (LHS.getLiveRangeContaining(End)) + return false; + + LiveInterval::iterator RI = std::upper_bound(LHS.begin(), LHS.end(), R); + if (RI != LHS.end() && RI->start < End) + return false; + } + + for (LiveInterval::iterator I = RHS.begin(), E = RHS.end(); I != E; ++I) { + LiveRange R = *I; + VNInfo* OldVN = R.valno; + VNInfo*& NewVN = VNMap[OldVN]; + if (!NewVN) { + NewVN = LHS.getNextValue(OldVN->def, + OldVN->copy, + LI.getVNInfoAllocator()); + NewVN->kills = OldVN->kills; + } + + LiveRange LR (R.start, R.end, NewVN); + LHS.addRange(LR); + } + + LI.removeInterval(RHS.reg); + + return true; +} + bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) { + LiveIntervals& LI = getAnalysis(); + // Compute DFS numbers of each block computeDFS(Fn); @@ -735,27 +913,141 @@ bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) { I->begin()->getOpcode() == TargetInstrInfo::PHI) processBlock(I); + // Break interferences where two different phis want to coalesce + // in the same register. + std::set seen; + typedef std::map > + RenameSetType; + for (RenameSetType::iterator I = RenameSets.begin(), E = RenameSets.end(); + I != E; ++I) { + for (std::map::iterator + OI = I->second.begin(), OE = I->second.end(); OI != OE; ) { + if (!seen.count(OI->first)) { + seen.insert(OI->first); + ++OI; + } else { + Waiting[OI->second].insert(std::make_pair(OI->first, I->first)); + unsigned reg = OI->first; + ++OI; + I->second.erase(reg); + DOUT << "Removing Renaming: " << reg << " -> " << I->first << "\n"; + } + } + } + // Insert copies - // FIXME: This process should probably preserve LiveVariables - std::set visited; - InsertCopies(Fn.begin(), visited); + // FIXME: This process should probably preserve LiveIntervals + SmallPtrSet visited; + MachineDominatorTree& MDT = getAnalysis(); + InsertCopies(MDT.getRootNode(), visited); // Perform renaming - typedef std::map > RenameSetType; for (RenameSetType::iterator I = RenameSets.begin(), E = RenameSets.end(); I != E; ++I) - for (std::set::iterator SI = I->second.begin(), - SE = I->second.end(); SI != SE; ++SI) - Fn.getRegInfo().replaceRegWith(*SI, I->first); - - // FIXME: Insert last-minute copies + while (I->second.size()) { + std::map::iterator SI = I->second.begin(); + + DOUT << "Renaming: " << SI->first << " -> " << I->first << "\n"; + + if (SI->first != I->first) { + if (mergeLiveIntervals(I->first, SI->first)) { + Fn.getRegInfo().replaceRegWith(SI->first, I->first); + + if (RenameSets.count(SI->first)) { + I->second.insert(RenameSets[SI->first].begin(), + RenameSets[SI->first].end()); + RenameSets.erase(SI->first); + } + } else { + // Insert a last-minute copy if a conflict was detected. + const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo(); + const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(I->first); + TII->copyRegToReg(*SI->second, SI->second->getFirstTerminator(), + I->first, SI->first, RC, RC); + + LI.computeNumbering(); + + LiveInterval& Int = LI.getOrCreateInterval(I->first); + unsigned instrIdx = + LI.getInstructionIndex(--SI->second->getFirstTerminator()); + if (Int.liveAt(LiveIntervals::getDefIndex(instrIdx))) + Int.removeRange(LiveIntervals::getDefIndex(instrIdx), + LI.getMBBEndIdx(SI->second)+1, true); + + LiveRange R = LI.addLiveRangeToEndOfBlock(I->first, + --SI->second->getFirstTerminator()); + R.valno->copy = --SI->second->getFirstTerminator(); + R.valno->def = LiveIntervals::getDefIndex(instrIdx); + + DOUT << "Renaming failed: " << SI->first << " -> " + << I->first << "\n"; + } + } + + LiveInterval& Int = LI.getOrCreateInterval(I->first); + const LiveRange* LR = + Int.getLiveRangeContaining(LI.getMBBEndIdx(SI->second)); + LR->valno->hasPHIKill = true; + + I->second.erase(SI->first); + } // Remove PHIs - for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) + std::vector phis; + for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) { for (MachineBasicBlock::iterator BI = I->begin(), BE = I->end(); BI != BE; ++BI) if (BI->getOpcode() == TargetInstrInfo::PHI) - BI->eraseFromParent(); + phis.push_back(BI); + } - return false; + for (std::vector::iterator I = phis.begin(), E = phis.end(); + I != E; ) { + MachineInstr* PInstr = *(I++); + + // If this is a dead PHI node, then remove it from LiveIntervals. + unsigned DestReg = PInstr->getOperand(0).getReg(); + LiveInterval& PI = LI.getInterval(DestReg); + if (PInstr->registerDefIsDead(DestReg)) { + if (PI.containsOneValue()) { + LI.removeInterval(DestReg); + } else { + unsigned idx = LI.getDefIndex(LI.getInstructionIndex(PInstr)); + PI.removeRange(*PI.getLiveRangeContaining(idx), true); + } + } else { + // Trim live intervals of input registers. They are no longer live into + // this block if they died after the PHI. If they lived after it, don't + // trim them because they might have other legitimate uses. + for (unsigned i = 1; i < PInstr->getNumOperands(); i += 2) { + unsigned reg = PInstr->getOperand(i).getReg(); + + MachineBasicBlock* MBB = PInstr->getOperand(i+1).getMBB(); + LiveInterval& InputI = LI.getInterval(reg); + if (MBB != PInstr->getParent() && + InputI.liveAt(LI.getMBBStartIdx(PInstr->getParent())) && + InputI.expiredAt(LI.getInstructionIndex(PInstr) + + LiveIntervals::InstrSlots::NUM)) + InputI.removeRange(LI.getMBBStartIdx(PInstr->getParent()), + LI.getInstructionIndex(PInstr), + true); + } + + // If the PHI is not dead, then the valno defined by the PHI + // now has an unknown def. + unsigned idx = LI.getDefIndex(LI.getInstructionIndex(PInstr)); + const LiveRange* PLR = PI.getLiveRangeContaining(idx); + PLR->valno->def = ~0U; + LiveRange R (LI.getMBBStartIdx(PInstr->getParent()), + PLR->start, PLR->valno); + PI.addRange(R); + } + + LI.RemoveMachineInstrFromMaps(PInstr); + PInstr->eraseFromParent(); + } + + LI.computeNumbering(); + + return true; }