X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FTwoAddressInstructionPass.cpp;h=3820a45d8f70513beda02cc26d9ef07d5173cef4;hb=236aa8a5032282d8793b537c0f3f7ffb381a83d4;hp=81864b7c0e4e81c6de067aae0d996d79db0d5beb;hpb=bd0879d7d9790e4bfa4bdcefd3abda0301e37bae;p=oota-llvm.git diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 81864b7c0e4..3820a45d8f7 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -37,22 +37,23 @@ #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Support/CommandLine.h" +#include "llvm/Target/TargetOptions.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" -#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/STLExtras.h" using namespace llvm; STATISTIC(NumTwoAddressInstrs, "Number of two-address instructions"); STATISTIC(NumCommuted , "Number of instructions commuted to coalesce"); +STATISTIC(NumAggrCommuted , "Number of instructions aggressively commuted"); STATISTIC(NumConvertedTo3Addr, "Number of instructions promoted to 3-address"); STATISTIC(Num3AddrSunk, "Number of 3-address instructions sunk"); - -static cl::opt -EnableReMat("2-addr-remat", cl::init(false), cl::Hidden, - cl::desc("Two-addr conversion should remat when possible.")); +STATISTIC(NumReMats, "Number of instructions re-materialized"); +STATISTIC(NumDeletes, "Number of dead instructions deleted"); namespace { class VISIBILITY_HIDDEN TwoAddressInstructionPass @@ -65,16 +66,37 @@ namespace { bool Sink3AddrInstruction(MachineBasicBlock *MBB, MachineInstr *MI, unsigned Reg, MachineBasicBlock::iterator OldPos); + + bool isProfitableToReMat(unsigned Reg, const TargetRegisterClass *RC, + MachineInstr *MI, MachineInstr *DefMI, + MachineBasicBlock *MBB, unsigned Loc, + DenseMap &DistanceMap); + + bool NoUseAfterLastDef(unsigned Reg, MachineBasicBlock *MBB, unsigned Dist, + DenseMap &DistanceMap, + unsigned &LastDef); + + bool isProfitableToCommute(unsigned regB, unsigned regC, + MachineInstr *MI, MachineBasicBlock *MBB, + unsigned Dist, + DenseMap &DistanceMap); + + bool CommuteInstruction(MachineBasicBlock::iterator &mi, + MachineFunction::iterator &mbbi, + unsigned RegC, unsigned Dist, + DenseMap &DistanceMap); public: static char ID; // Pass identification, replacement for typeid - TwoAddressInstructionPass() : MachineFunctionPass((intptr_t)&ID) {} + TwoAddressInstructionPass() : MachineFunctionPass(&ID) {} virtual void getAnalysisUsage(AnalysisUsage &AU) const { - AU.addRequired(); AU.addPreserved(); AU.addPreservedID(MachineLoopInfoID); AU.addPreservedID(MachineDominatorsID); - AU.addPreservedID(PHIEliminationID); + if (StrongPHIElim) + AU.addPreservedID(StrongPHIEliminationID); + else + AU.addPreservedID(PHIEliminationID); MachineFunctionPass::getAnalysisUsage(AU); } @@ -93,7 +115,6 @@ const PassInfo *const llvm::TwoAddressInstructionPassID = &X; /// three-address instruction to avoid clobbering a register. Try to sink it /// past the instruction that would kill the above mentioned register to reduce /// register pressure. -/// bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB, MachineInstr *MI, unsigned SavedReg, MachineBasicBlock::iterator OldPos) { @@ -107,7 +128,7 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB, for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isRegister()) + if (!MO.isReg()) continue; unsigned MOReg = MO.getReg(); if (!MOReg) @@ -127,7 +148,6 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB, // Find the instruction that kills SavedReg. MachineInstr *KillMI = NULL; - for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SavedReg), UE = MRI->use_end(); UI != UE; ++UI) { MachineOperand &UseMO = UI.getOperand(); @@ -144,18 +164,21 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB, // position and the kill use, then it's not safe to sink it. // // FIXME: This can be sped up if there is an easy way to query whether an - // instruction if before or after another instruction. Then we can use + // instruction is before or after another instruction. Then we can use // MachineRegisterInfo def / use instead. MachineOperand *KillMO = NULL; MachineBasicBlock::iterator KillPos = KillMI; ++KillPos; + unsigned NumVisited = 0; for (MachineBasicBlock::iterator I = next(OldPos); I != KillPos; ++I) { MachineInstr *OtherMI = I; - + if (NumVisited > 30) // FIXME: Arbitrary limit to reduce compile time cost. + return false; + ++NumVisited; for (unsigned i = 0, e = OtherMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = OtherMI->getOperand(i); - if (!MO.isRegister()) + if (!MO.isReg()) continue; unsigned MOReg = MO.getReg(); if (!MOReg) @@ -165,8 +188,8 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB, if (MO.isKill()) { if (OtherMI == KillMI && MOReg == SavedReg) - // Save the operand that kills the register. We want unset the kill - // marker is we can sink MI past it. + // Save the operand that kills the register. We want to unset the kill + // marker if we can sink MI past it. KillMO = &MO; else if (UseRegs.count(MOReg)) // One of the uses is killed before the destination. @@ -179,9 +202,9 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB, KillMO->setIsKill(false); KillMO = MI->findRegisterUseOperand(SavedReg, false, TRI); KillMO->setIsKill(true); - LiveVariables::VarInfo& VarInfo = LV->getVarInfo(SavedReg); - VarInfo.removeKill(KillMI); - VarInfo.Kills.push_back(MI); + + if (LV) + LV->replaceKillInstruction(SavedReg, KillMI, MI); // Move instruction to its destination. MBB->remove(MI); @@ -191,6 +214,184 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB, return true; } +/// isTwoAddrUse - Return true if the specified MI is using the specified +/// register as a two-address operand. +static bool isTwoAddrUse(MachineInstr *UseMI, unsigned Reg) { + const TargetInstrDesc &TID = UseMI->getDesc(); + for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) { + MachineOperand &MO = UseMI->getOperand(i); + if (MO.isReg() && MO.getReg() == Reg && + (MO.isDef() || TID.getOperandConstraint(i, TOI::TIED_TO) != -1)) + // Earlier use is a two-address one. + return true; + } + return false; +} + +/// isProfitableToReMat - Return true if the heuristics determines it is likely +/// to be profitable to re-materialize the definition of Reg rather than copy +/// the register. +bool +TwoAddressInstructionPass::isProfitableToReMat(unsigned Reg, + const TargetRegisterClass *RC, + MachineInstr *MI, MachineInstr *DefMI, + MachineBasicBlock *MBB, unsigned Loc, + DenseMap &DistanceMap){ + bool OtherUse = false; + for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg), + UE = MRI->use_end(); UI != UE; ++UI) { + MachineOperand &UseMO = UI.getOperand(); + MachineInstr *UseMI = UseMO.getParent(); + MachineBasicBlock *UseMBB = UseMI->getParent(); + if (UseMBB == MBB) { + DenseMap::iterator DI = DistanceMap.find(UseMI); + if (DI != DistanceMap.end() && DI->second == Loc) + continue; // Current use. + OtherUse = true; + // There is at least one other use in the MBB that will clobber the + // register. + if (isTwoAddrUse(UseMI, Reg)) + return true; + } + } + + // If other uses in MBB are not two-address uses, then don't remat. + if (OtherUse) + return false; + + // No other uses in the same block, remat if it's defined in the same + // block so it does not unnecessarily extend the live range. + return MBB == DefMI->getParent(); +} + +/// NoUseAfterLastDef - Return true if there are no intervening uses between the +/// last instruction in the MBB that defines the specified register and the +/// two-address instruction which is being processed. It also returns the last +/// def location by reference +bool TwoAddressInstructionPass::NoUseAfterLastDef(unsigned Reg, + MachineBasicBlock *MBB, unsigned Dist, + DenseMap &DistanceMap, + unsigned &LastDef) { + LastDef = 0; + unsigned LastUse = Dist; + for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(Reg), + E = MRI->reg_end(); I != E; ++I) { + MachineOperand &MO = I.getOperand(); + MachineInstr *MI = MO.getParent(); + if (MI->getParent() != MBB) + continue; + DenseMap::iterator DI = DistanceMap.find(MI); + if (DI == DistanceMap.end()) + continue; + if (MO.isUse() && DI->second < LastUse) + LastUse = DI->second; + if (MO.isDef() && DI->second > LastDef) + LastDef = DI->second; + } + + return !(LastUse > LastDef && LastUse < Dist); +} + +/// isProfitableToReMat - Return true if it's potentially profitable to commute +/// the two-address instruction that's being processed. +bool +TwoAddressInstructionPass::isProfitableToCommute(unsigned regB, unsigned regC, + MachineInstr *MI, MachineBasicBlock *MBB, + unsigned Dist, DenseMap &DistanceMap) { + // Determine if it's profitable to commute this two address instruction. In + // general, we want no uses between this instruction and the definition of + // the two-address register. + // e.g. + // %reg1028 = EXTRACT_SUBREG %reg1027, 1 + // %reg1029 = MOV8rr %reg1028 + // %reg1029 = SHR8ri %reg1029, 7, %EFLAGS + // insert => %reg1030 = MOV8rr %reg1028 + // %reg1030 = ADD8rr %reg1028, %reg1029, %EFLAGS + // In this case, it might not be possible to coalesce the second MOV8rr + // instruction if the first one is coalesced. So it would be profitable to + // commute it: + // %reg1028 = EXTRACT_SUBREG %reg1027, 1 + // %reg1029 = MOV8rr %reg1028 + // %reg1029 = SHR8ri %reg1029, 7, %EFLAGS + // insert => %reg1030 = MOV8rr %reg1029 + // %reg1030 = ADD8rr %reg1029, %reg1028, %EFLAGS + + if (!MI->killsRegister(regC)) + return false; + + // Ok, we have something like: + // %reg1030 = ADD8rr %reg1028, %reg1029, %EFLAGS + // let's see if it's worth commuting it. + + // If there is a use of regC between its last def (could be livein) and this + // instruction, then bail. + unsigned LastDefC = 0; + if (!NoUseAfterLastDef(regC, MBB, Dist, DistanceMap, LastDefC)) + return false; + + // If there is a use of regB between its last def (could be livein) and this + // instruction, then go ahead and make this transformation. + unsigned LastDefB = 0; + if (!NoUseAfterLastDef(regB, MBB, Dist, DistanceMap, LastDefB)) + return true; + + // Since there are no intervening uses for both registers, then commute + // if the def of regC is closer. Its live interval is shorter. + return LastDefB && LastDefC && LastDefC > LastDefB; +} + +/// CommuteInstruction - Commute a two-address instruction and update the basic +/// block, distance map, and live variables if needed. Return true if it is +/// successful. +bool +TwoAddressInstructionPass::CommuteInstruction(MachineBasicBlock::iterator &mi, + MachineFunction::iterator &mbbi, + unsigned RegC, unsigned Dist, + DenseMap &DistanceMap) { + MachineInstr *MI = mi; + DOUT << "2addr: COMMUTING : " << *MI; + MachineInstr *NewMI = TII->commuteInstruction(MI); + + if (NewMI == 0) { + DOUT << "2addr: COMMUTING FAILED!\n"; + return false; + } + + DOUT << "2addr: COMMUTED TO: " << *NewMI; + // If the instruction changed to commute it, update livevar. + if (NewMI != MI) { + if (LV) + // Update live variables + LV->replaceKillInstruction(RegC, MI, NewMI); + + mbbi->insert(mi, NewMI); // Insert the new inst + mbbi->erase(mi); // Nuke the old inst. + mi = NewMI; + DistanceMap.insert(std::make_pair(NewMI, Dist)); + } + return true; +} + +/// isSafeToDelete - If the specified instruction does not produce any side +/// effects and all of its defs are dead, then it's safe to delete. +static bool isSafeToDelete(MachineInstr *MI, const TargetInstrInfo *TII) { + const TargetInstrDesc &TID = MI->getDesc(); + if (TID.mayStore() || TID.isCall()) + return false; + if (TID.isTerminator() || TID.hasUnmodeledSideEffects()) + return false; + + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI->getOperand(i); + if (!MO.isReg() || !MO.isDef()) + continue; + if (!MO.isDead()) + return false; + } + + return true; +} + /// runOnMachineFunction - Reduce two-address instructions to two operands. /// bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { @@ -199,23 +400,32 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { MRI = &MF.getRegInfo(); TII = TM.getInstrInfo(); TRI = TM.getRegisterInfo(); - LV = &getAnalysis(); + LV = getAnalysisIfAvailable(); bool MadeChange = false; DOUT << "********** REWRITING TWO-ADDR INSTRS **********\n"; DOUT << "********** Function: " << MF.getFunction()->getName() << '\n'; - SmallPtrSet ReMattedInstrs; + // ReMatRegs - Keep track of the registers whose def's are remat'ed. + BitVector ReMatRegs; + ReMatRegs.resize(MRI->getLastVirtReg()+1); + + // DistanceMap - Keep track the distance of a MI from the start of the + // current basic block. + DenseMap DistanceMap; for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) { + unsigned Dist = 0; + DistanceMap.clear(); for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end(); mi != me; ) { MachineBasicBlock::iterator nmi = next(mi); const TargetInstrDesc &TID = mi->getDesc(); bool FirstTied = true; + DistanceMap.insert(std::make_pair(mi, ++Dist)); for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) { int ti = TID.getOperandConstraint(si, TOI::TIED_TO); if (ti == -1) @@ -228,7 +438,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { FirstTied = false; - assert(mi->getOperand(si).isRegister() && mi->getOperand(si).getReg() && + assert(mi->getOperand(si).isReg() && mi->getOperand(si).getReg() && mi->getOperand(si).isUse() && "two address instruction invalid"); // If the two operands are the same we just remove the use @@ -252,7 +462,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { // should never occur because we are in SSA form. for (unsigned i = 0; i != mi->getNumOperands(); ++i) assert((int)i == ti || - !mi->getOperand(i).isRegister() || + !mi->getOperand(i).isReg() || mi->getOperand(i).getReg() != regA); #endif @@ -261,31 +471,25 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { // allow us to coalesce A and B together, eliminating the copy we are // about to insert. if (!mi->killsRegister(regB)) { + // If regA is dead and the instruction can be deleted, just delete + // it so it doesn't clobber regB. + if (mi->getOperand(ti).isDead() && isSafeToDelete(mi, TII)) { + mbbi->erase(mi); // Nuke the old inst. + mi = nmi; + ++NumDeletes; + break; // Done with this instruction. + } + // If this instruction is commutative, check to see if C dies. If // so, swap the B and C operands. This makes the live ranges of A // and C joinable. // FIXME: This code also works for A := B op C instructions. if (TID.isCommutable() && mi->getNumOperands() >= 3) { - assert(mi->getOperand(3-si).isRegister() && + assert(mi->getOperand(3-si).isReg() && "Not a proper commutative instruction!"); unsigned regC = mi->getOperand(3-si).getReg(); - if (mi->killsRegister(regC)) { - DOUT << "2addr: COMMUTING : " << *mi; - MachineInstr *NewMI = TII->commuteInstruction(mi); - - if (NewMI == 0) { - DOUT << "2addr: COMMUTING FAILED!\n"; - } else { - DOUT << "2addr: COMMUTED TO: " << *NewMI; - // If the instruction changed to commute it, update livevar. - if (NewMI != mi) { - LV->instructionChanged(mi, NewMI); // Update live variables - mbbi->insert(mi, NewMI); // Insert the new inst - mbbi->erase(mi); // Nuke the old inst. - mi = NewMI; - } - + if (CommuteInstruction(mi, mbbi, regC, Dist, DistanceMap)) { ++NumCommuted; regB = regC; goto InstructionRearranged; @@ -303,21 +507,23 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1); #endif - if (MachineInstr *New=TII->convertToThreeAddress(mbbi, mi, *LV)) { + MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV); + if (NewMI) { DOUT << "2addr: CONVERTING 2-ADDR: " << *mi; - DOUT << "2addr: TO 3-ADDR: " << *New; + DOUT << "2addr: TO 3-ADDR: " << *NewMI; bool Sunk = false; - if (New->findRegisterUseOperand(regB, false, TRI)) + if (NewMI->findRegisterUseOperand(regB, false, TRI)) // FIXME: Temporary workaround. If the new instruction doesn't // uses regB, convertToThreeAddress must have created more // then one instruction. - Sunk = Sink3AddrInstruction(mbbi, New, regB, mi); + Sunk = Sink3AddrInstruction(mbbi, NewMI, regB, mi); mbbi->erase(mi); // Nuke the old inst. if (!Sunk) { - mi = New; + DistanceMap.insert(std::make_pair(NewMI, Dist)); + mi = NewMI; nmi = next(mi); } @@ -327,40 +533,58 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { } } + // If it's profitable to commute the instruction, do so. + if (TID.isCommutable() && mi->getNumOperands() >= 3) { + unsigned regC = mi->getOperand(3-si).getReg(); + if (isProfitableToCommute(regB, regC, mi, mbbi, Dist, DistanceMap)) + if (CommuteInstruction(mi, mbbi, regC, Dist, DistanceMap)) { + ++NumAggrCommuted; + ++NumCommuted; + regB = regC; + } + } + InstructionRearranged: - const TargetRegisterClass* rc = MF.getRegInfo().getRegClass(regA); - MachineInstr *Orig = MRI->getVRegDef(regB); - const TargetInstrDesc &OrigTID = Orig->getDesc(); - bool SawStore = false; - - if (EnableReMat && Orig && Orig->isSafeToMove(TII, SawStore) && - OrigTID.isAsCheapAsAMove() && !OrigTID.mayLoad() && - !OrigTID.isSimpleLoad()) { - DEBUG(cerr << "2addr: REMATTING : " << *Orig << "\n"); - TII->reMaterialize(*mbbi, mi, regA, Orig); - ReMattedInstrs.insert(Orig); + const TargetRegisterClass* rc = MRI->getRegClass(regA); + MachineInstr *DefMI = MRI->getVRegDef(regB); + // If it's safe and profitable, remat the definition instead of + // copying it. + if (DefMI && + DefMI->getDesc().isAsCheapAsAMove() && + DefMI->isSafeToReMat(TII, regB) && + isProfitableToReMat(regB, rc, mi, DefMI, mbbi, Dist,DistanceMap)){ + DEBUG(cerr << "2addr: REMATTING : " << *DefMI << "\n"); + TII->reMaterialize(*mbbi, mi, regA, DefMI); + ReMatRegs.set(regB); + ++NumReMats; } else { TII->copyRegToReg(*mbbi, mi, regA, regB, rc, rc); } - MachineBasicBlock::iterator prevMi = prior(mi); - DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM)); + MachineBasicBlock::iterator prevMI = prior(mi); + // Update DistanceMap. + DistanceMap.insert(std::make_pair(prevMI, Dist)); + DistanceMap[mi] = ++Dist; // Update live variables for regB. - LiveVariables::VarInfo& varInfoB = LV->getVarInfo(regB); + if (LV) { + LiveVariables::VarInfo& varInfoB = LV->getVarInfo(regB); - // regB is used in this BB. - varInfoB.UsedBlocks[mbbi->getNumber()] = true; + // regB is used in this BB. + varInfoB.UsedBlocks[mbbi->getNumber()] = true; - if (LV->removeVirtualRegisterKilled(regB, mbbi, mi)) - LV->addVirtualRegisterKilled(regB, prevMi); + if (LV->removeVirtualRegisterKilled(regB, mi)) + LV->addVirtualRegisterKilled(regB, prevMI); - if (LV->removeVirtualRegisterDead(regB, mbbi, mi)) - LV->addVirtualRegisterDead(regB, prevMi); + if (LV->removeVirtualRegisterDead(regB, mi)) + LV->addVirtualRegisterDead(regB, prevMI); + } + DOUT << "\t\tprepend:\t"; DEBUG(prevMI->print(*cerr.stream(), &TM)); + // Replace all occurences of regB with regA. for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) { - if (mi->getOperand(i).isRegister() && + if (mi->getOperand(i).isReg() && mi->getOperand(i).getReg() == regB) mi->getOperand(i).setReg(regA); } @@ -377,34 +601,14 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { } } - if (EnableReMat) { - // Check to see if the instructions that we rematerialized are now dead. If - // they are, expunge them here. - SmallPtrSet::iterator I = ReMattedInstrs.begin(); - SmallPtrSet::iterator E = ReMattedInstrs.end(); - - for (; I != E; ++I) { - MachineInstr *MI = *I; - bool InstrDead = true; - - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - if (!MO.isRegister()) - continue; - unsigned MOReg = MO.getReg(); - - if (!MOReg || !MO.isDef() || (MO.isImplicit() && MO.isDead())) - continue; - - if (MRI->use_begin(MOReg) != MRI->use_end()) { - InstrDead = false; - break; - } - } - - if (InstrDead) - MI->eraseFromParent(); + // Some remat'ed instructions are dead. + int VReg = ReMatRegs.find_first(); + while (VReg != -1) { + if (MRI->use_empty(VReg)) { + MachineInstr *DefMI = MRI->getVRegDef(VReg); + DefMI->eraseFromParent(); } + VReg = ReMatRegs.find_next(VReg); } return MadeChange;