X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FVirtRegMap.h;h=ca174d5127af3435752fc9ae3ffa68b25abe5395;hb=25d812bd7d1f58f2ba1b598b1425a2e146e27381;hp=962c9dea3e9413562b6b59dbf22e3f0e81c43d70;hpb=8fe00540fc6e1531d909d0688cc75a77b7dfa330;p=oota-llvm.git diff --git a/lib/CodeGen/VirtRegMap.h b/lib/CodeGen/VirtRegMap.h index 962c9dea3e9..ca174d5127a 100644 --- a/lib/CodeGen/VirtRegMap.h +++ b/lib/CodeGen/VirtRegMap.h @@ -18,18 +18,23 @@ #define LLVM_CODEGEN_VIRTREGMAP_H #include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/LiveInterval.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/ADT/BitVector.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/IndexedMap.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/SmallVector.h" -#include "llvm/Support/Streams.h" #include namespace llvm { + class LiveIntervals; class MachineInstr; class MachineFunction; + class MachineRegisterInfo; class TargetInstrInfo; + class TargetRegisterInfo; + class raw_ostream; class VirtRegMap : public MachineFunctionPass { public: @@ -44,9 +49,13 @@ namespace llvm { std::pair > MI2VirtMapTy; private: + MachineRegisterInfo *MRI; const TargetInstrInfo *TII; - + const TargetRegisterInfo *TRI; MachineFunction *MF; + + DenseMap allocatableRCRegs; + /// Virt2PhysMap - This is a virtual to physical register /// mapping. Each virtual register is required to have an entry in /// it; even spilled virtual registers (the register mapped to a @@ -71,7 +80,7 @@ namespace llvm { /// Virt2SplitKillMap - This is splitted virtual register to its last use /// (kill) index mapping. - IndexedMap Virt2SplitKillMap; + IndexedMap Virt2SplitKillMap; /// ReMatMap - This is virtual register to re-materialized instruction /// mapping. Each virtual register whose definition is going to be @@ -122,6 +131,9 @@ namespace llvm { /// the register is implicitly defined. BitVector ImplicitDefed; + /// UnusedRegs - A list of physical registers that have not been used. + BitVector UnusedRegs; + VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT void operator=(const VirtRegMap&); // DO NOT IMPLEMENT @@ -130,7 +142,7 @@ namespace llvm { VirtRegMap() : MachineFunctionPass(&ID), Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT), Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0), - Virt2SplitKillMap(0), ReMatMap(NULL), + Virt2SplitKillMap(MachineInstrIndex()), ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1), LowSpillSlot(NO_STACK_SLOT), HighSpillSlot(NO_STACK_SLOT) { } virtual bool runOnMachineFunction(MachineFunction &MF); @@ -181,6 +193,9 @@ namespace llvm { grow(); } + /// @brief returns the register allocation preference. + unsigned getRegAllocPref(unsigned virtReg); + /// @brief records virtReg is a split live interval from SReg. void setIsSplitFromReg(unsigned virtReg, unsigned SReg) { Virt2SplitMap[virtReg] = SReg; @@ -251,17 +266,17 @@ namespace llvm { } /// @brief record the last use (kill) of a split virtual register. - void addKillPoint(unsigned virtReg, unsigned index) { + void addKillPoint(unsigned virtReg, MachineInstrIndex index) { Virt2SplitKillMap[virtReg] = index; } - unsigned getKillPoint(unsigned virtReg) const { + MachineInstrIndex getKillPoint(unsigned virtReg) const { return Virt2SplitKillMap[virtReg]; } /// @brief remove the last use (kill) of a split virtual register. void removeKillPoint(unsigned virtReg) { - Virt2SplitKillMap[virtReg] = 0; + Virt2SplitKillMap[virtReg] = MachineInstrIndex(); } /// @brief returns true if the specified MachineInstr is a spill point. @@ -277,8 +292,10 @@ namespace llvm { /// @brief records the specified MachineInstr as a spill point for virtReg. void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) { - if (SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end()) - SpillPt2VirtMap[Pt].push_back(std::make_pair(virtReg, isKill)); + std::map > >::iterator + I = SpillPt2VirtMap.find(Pt); + if (I != SpillPt2VirtMap.end()) + I->second.push_back(std::make_pair(virtReg, isKill)); else { std::vector > Virts; Virts.push_back(std::make_pair(virtReg, isKill)); @@ -289,7 +306,7 @@ namespace llvm { /// @brief - transfer spill point information from one instruction to /// another. void transferSpillPts(MachineInstr *Old, MachineInstr *New) { - std::map > >::iterator + std::map > >::iterator I = SpillPt2VirtMap.find(Old); if (I == SpillPt2VirtMap.end()) return; @@ -315,8 +332,10 @@ namespace llvm { /// @brief records the specified MachineInstr as a restore point for virtReg. void addRestorePoint(unsigned virtReg, MachineInstr *Pt) { - if (RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end()) - RestorePt2VirtMap[Pt].push_back(virtReg); + std::map >::iterator I = + RestorePt2VirtMap.find(Pt); + if (I != RestorePt2VirtMap.end()) + I->second.push_back(virtReg); else { std::vector Virts; Virts.push_back(virtReg); @@ -327,7 +346,7 @@ namespace llvm { /// @brief - transfer restore point information from one instruction to /// another. void transferRestorePts(MachineInstr *Old, MachineInstr *New) { - std::map >::iterator I = + std::map >::iterator I = RestorePt2VirtMap.find(Old); if (I == RestorePt2VirtMap.end()) return; @@ -430,18 +449,44 @@ namespace llvm { /// the folded instruction map and spill point map. void RemoveMachineInstrFromMaps(MachineInstr *MI); - bool OnlyUseOfStackSlot(const MachineInstr *MI) const; + /// FindUnusedRegisters - Gather a list of allocatable registers that + /// have not been allocated to any virtual register. + bool FindUnusedRegisters(LiveIntervals* LIs); + + /// HasUnusedRegisters - Return true if there are any allocatable registers + /// that have not been allocated to any virtual register. + bool HasUnusedRegisters() const { + return !UnusedRegs.none(); + } + + /// setRegisterUsed - Remember the physical register is now used. + void setRegisterUsed(unsigned Reg) { + UnusedRegs.reset(Reg); + } + + /// isRegisterUnused - Return true if the physical register has not been + /// used. + bool isRegisterUnused(unsigned Reg) const { + return UnusedRegs[Reg]; + } - void print(std::ostream &OS, const Module* M = 0) const; - void print(std::ostream *OS) const { if (OS) print(*OS); } + /// getFirstUnusedRegister - Return the first physical register that has not + /// been used. + unsigned getFirstUnusedRegister(const TargetRegisterClass *RC) { + int Reg = UnusedRegs.find_first(); + while (Reg != -1) { + if (allocatableRCRegs[RC][Reg]) + return (unsigned)Reg; + Reg = UnusedRegs.find_next(Reg); + } + return 0; + } + + void print(raw_ostream &OS, const Module* M = 0) const; void dump() const; }; - inline std::ostream *operator<<(std::ostream *OS, const VirtRegMap &VRM) { - VRM.print(OS); - return OS; - } - inline std::ostream &operator<<(std::ostream &OS, const VirtRegMap &VRM) { + inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) { VRM.print(OS); return OS; }