X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FAArch64%2FAArch64Subtarget.h;h=6bb069423060bfed2aecae1d0f0ab4dc618b06b0;hb=00552e3875ee5f382db6c98286a241a7d0efe1b8;hp=bcab97d5da335f8b9f3824cddbc387124ebb2409;hpb=27d12f3e6e2079c9d9d69caae267ed0320109ffa;p=oota-llvm.git diff --git a/lib/Target/AArch64/AArch64Subtarget.h b/lib/Target/AArch64/AArch64Subtarget.h index bcab97d5da3..6bb06942306 100644 --- a/lib/Target/AArch64/AArch64Subtarget.h +++ b/lib/Target/AArch64/AArch64Subtarget.h @@ -29,6 +29,7 @@ namespace llvm { class GlobalValue; class StringRef; +class Triple; class AArch64Subtarget : public AArch64GenSubtargetInfo { protected: @@ -37,11 +38,12 @@ protected: /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others. ARMProcFamilyEnum ARMProcFamily; + bool HasV8_1aOps; + bool HasFPARMv8; bool HasNEON; bool HasCrypto; bool HasCRC; - bool HasV8_1a; // HasZeroCycleRegMove - Has zero-cycle register mov instructions. bool HasZeroCycleRegMove; @@ -70,7 +72,7 @@ private: public: /// This constructor initializes the data members to match that /// of the specified triple. - AArch64Subtarget(const std::string &TT, const std::string &CPU, + AArch64Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian); @@ -89,10 +91,12 @@ public: } const Triple &getTargetTriple() const { return TargetTriple; } bool enableMachineScheduler() const override { return true; } - bool enablePostMachineScheduler() const override { + bool enablePostRAScheduler() const override { return isCortexA53() || isCortexA57(); } + bool hasV8_1aOps() const { return HasV8_1aOps; } + bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; } bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; } @@ -101,7 +105,6 @@ public: bool hasNEON() const { return HasNEON; } bool hasCrypto() const { return HasCrypto; } bool hasCRC() const { return HasCRC; } - bool hasV8_1a() const { return HasV8_1a; } bool isLittleEndian() const { return IsLittle; }