X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FARM%2FARMConstantIslandPass.cpp;h=9fedaa465434a80bb50574a784bb4b5da7c95159;hb=ac57e6e498abccb117e0d61c2fa0f733845e50cb;hp=ba74c115524f0452a99f7e89e090e93077b9d14d;hpb=185ea1e2aad88b13c3978197851da078601afff3;p=oota-llvm.git diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index ba74c115524..9fedaa46543 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by Chris Lattner and is distributed under the -// University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -47,14 +47,15 @@ namespace { /// CPE - A constant pool entry that has been placed somewhere, which /// tracks a list of users. class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass { - /// NextUID - Assign unique ID's to CPE's. - unsigned NextUID; - /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed - /// by MBB Number. + /// by MBB Number. The two-byte pads required for Thumb alignment are + /// counted as part of the following block (i.e., the offset and size for + /// a padded block will both be ==2 mod 4). std::vector BBSizes; - + /// BBOffsets - the offset of each MBB in bytes, starting from 0. + /// The two-byte pads required for Thumb alignment are counted as part of + /// the following block. std::vector BBOffsets; /// WaterList - A sorted list of basic blocks where islands could be placed @@ -72,11 +73,11 @@ namespace { CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp) : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp) {} }; - + /// CPUsers - Keep track of all of the machine instructions that use various /// constant pools and their max displacement. std::vector CPUsers; - + /// CPEntry - One per constant pool entry, keeping the machine instruction /// pointer, the constpool index, and the number of CPUser's which /// reference this entry. @@ -94,7 +95,7 @@ namespace { /// Original elements are cloned as we go along; the clones are /// put in the vector of the original element, but have distinct CPIs. std::vector > CPEntries; - + /// ImmBranch - One per immediate branch, keeping the machine instruction /// pointer, conditional or unconditional, the max displacement, /// and (if isCond is true) the corresponding unconditional branch @@ -108,7 +109,7 @@ namespace { : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {} }; - /// Branches - Keep track of all the immediate branch instructions. + /// ImmBranches - Keep track of all the immediate branch instructions. /// std::vector ImmBranches; @@ -121,14 +122,19 @@ namespace { bool HasFarJump; const TargetInstrInfo *TII; + ARMFunctionInfo *AFI; bool isThumb; + bool isThumb2; public: + static char ID; + ARMConstantIslands() : MachineFunctionPass(&ID) {} + virtual bool runOnMachineFunction(MachineFunction &Fn); virtual const char *getPassName() const { return "ARM constant island placement and branch shortening pass"; } - + private: void DoInitialPlacement(MachineFunction &Fn, std::vector &CPEMIs); @@ -140,18 +146,20 @@ namespace { void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta); bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI); int LookForExistingCPEntry(CPUser& U, unsigned UserOffset); - bool LookForWater(CPUser&U, unsigned UserOffset, bool* PadNewWater, + bool LookForWater(CPUser&U, unsigned UserOffset, MachineBasicBlock** NewMBB); + MachineBasicBlock* AcceptWater(MachineBasicBlock *WaterBB, + std::vector::iterator IP); void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset, MachineBasicBlock** NewMBB); bool HandleConstantPoolUser(MachineFunction &Fn, unsigned CPUserIndex); void RemoveDeadCPEMI(MachineInstr *CPEMI); bool RemoveUnusedCPEntries(); - bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset, + bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset, MachineInstr *CPEMI, unsigned Disp, bool DoDump); bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water, - unsigned Disp); + CPUser &U); bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset, unsigned Disp, bool NegativeOK); bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp); @@ -161,7 +169,37 @@ namespace { bool UndoLRSpillRestore(); unsigned GetOffsetOf(MachineInstr *MI) const; + void dumpBBs(); + void verify(MachineFunction &Fn); }; + char ARMConstantIslands::ID = 0; +} + +/// verify - check BBOffsets, BBSizes, alignment of islands +void ARMConstantIslands::verify(MachineFunction &Fn) { + assert(BBOffsets.size() == BBSizes.size()); + for (unsigned i = 1, e = BBOffsets.size(); i != e; ++i) + assert(BBOffsets[i-1]+BBSizes[i-1] == BBOffsets[i]); + if (isThumb) { + for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end(); + MBBI != E; ++MBBI) { + MachineBasicBlock *MBB = MBBI; + if (!MBB->empty() && + MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) + assert((BBOffsets[MBB->getNumber()]%4 == 0 && + BBSizes[MBB->getNumber()]%4 == 0) || + (BBOffsets[MBB->getNumber()]%4 != 0 && + BBSizes[MBB->getNumber()]%4 != 0)); + } + } +} + +/// print block size and offset information - debugging +void ARMConstantIslands::dumpBBs() { + for (unsigned J = 0, E = BBOffsets.size(); J !=E; ++J) { + DOUT << "block " << J << " offset " << BBOffsets[J] << + " size " << BBSizes[J] << "\n"; + } } /// createARMConstantIslandPass - returns an instance of the constpool @@ -172,10 +210,11 @@ FunctionPass *llvm::createARMConstantIslandPass() { bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) { MachineConstantPool &MCP = *Fn.getConstantPool(); - ARMFunctionInfo *AFI = Fn.getInfo(); - + TII = Fn.getTarget().getInstrInfo(); + AFI = Fn.getInfo(); isThumb = AFI->isThumbFunction(); + isThumb2 = AFI->isThumb2Function(); HasFarJump = false; @@ -183,8 +222,9 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) { // the numbers agree with the position of the block in the function. Fn.RenumberBlocks(); - /// Thumb functions containing constant pools get 2-byte alignment. This is so - /// we can keep exact track of where the alignment padding goes. Set default. + /// Thumb functions containing constant pools get 2-byte alignment. + /// This is so we can keep exact track of where the alignment padding goes. + /// Set default. AFI->setAlign(isThumb ? 1U : 2U); // Perform the initial placement of the constant pool entries. To start with, @@ -195,16 +235,16 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) { if (isThumb) AFI->setAlign(2U); } - + /// The next UID to take is the first unused one. - NextUID = CPEMIs.size(); - + AFI->initConstPoolEntryUId(CPEMIs.size()); + // Do the initial scan of the function, building up information about the // sizes of each block, the location of all the water, and finding all of the // constant pool users. InitialFunctionScan(Fn, CPEMIs); CPEMIs.clear(); - + /// Remove dead constant pool entries. RemoveUnusedCPEntries(); @@ -215,13 +255,18 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) { bool Change = false; for (unsigned i = 0, e = CPUsers.size(); i != e; ++i) Change |= HandleConstantPoolUser(Fn, i); + DEBUG(dumpBBs()); for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i) Change |= FixUpImmediateBr(Fn, ImmBranches[i]); + DEBUG(dumpBBs()); if (!Change) break; MadeChange = true; } + // After a while, this might be made debug-only, but it is not expensive. + verify(Fn); + // If LR has been forced spilled and no far jumps (i.e. BL) has been issued. // Undo the spill / restore of LR if possible. if (!HasFarJump && AFI->isLRSpilledForFarJump() && isThumb) @@ -241,25 +286,25 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) { /// DoInitialPlacement - Perform the initial placement of the constant pool /// entries. To start with, we put them all at the end of the function. void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn, - std::vector &CPEMIs){ + std::vector &CPEMIs) { // Create the basic block to hold the CPE's. - MachineBasicBlock *BB = new MachineBasicBlock(); - Fn.getBasicBlockList().push_back(BB); - + MachineBasicBlock *BB = Fn.CreateMachineBasicBlock(); + Fn.push_back(BB); + // Add all of the constants from the constant pool to the end block, use an // identity mapping of CPI's to CPE's. const std::vector &CPs = Fn.getConstantPool()->getConstants(); - + const TargetData &TD = *Fn.getTarget().getTargetData(); for (unsigned i = 0, e = CPs.size(); i != e; ++i) { - unsigned Size = TD.getTypeSize(CPs[i].getType()); + unsigned Size = TD.getTypeAllocSize(CPs[i].getType()); // Verify that all constant pool entries are a multiple of 4 bytes. If not, // we would have to pad them out or something so that instructions stay // aligned. assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!"); MachineInstr *CPEMI = - BuildMI(BB, TII->get(ARM::CONSTPOOL_ENTRY)) + BuildMI(BB, DebugLoc::getUnknownLoc(), TII->get(ARM::CONSTPOOL_ENTRY)) .addImm(i).addConstantPoolIndex(i).addImm(Size); CPEMIs.push_back(CPEMI); @@ -279,13 +324,13 @@ static bool BBHasFallthrough(MachineBasicBlock *MBB) { MachineFunction::iterator MBBI = MBB; if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function. return false; - + MachineBasicBlock *NextBB = next(MBBI); for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(), E = MBB->succ_end(); I != E; ++I) if (*I == NextBB) return true; - + return false; } @@ -313,27 +358,37 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn, for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end(); MBBI != E; ++MBBI) { MachineBasicBlock &MBB = *MBBI; - + // If this block doesn't fall through into the next MBB, then this is // 'water' that a constant pool island could be placed. if (!BBHasFallthrough(&MBB)) WaterList.push_back(&MBB); - + unsigned MBBSize = 0; for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I) { // Add instruction size to MBBSize. - MBBSize += ARM::GetInstSize(I); + MBBSize += TII->GetInstSizeInBytes(I); int Opc = I->getOpcode(); - if (TII->isBranch(Opc)) { + if (I->getDesc().isBranch()) { bool isCond = false; unsigned Bits = 0; unsigned Scale = 1; int UOpc = Opc; switch (Opc) { + case ARM::tBR_JTr: + case ARM::t2BR_JTr: + case ARM::t2BR_JTm: + case ARM::t2BR_JTadd: + // A Thumb table jump may involve padding; for the offsets to + // be right, functions containing these must be 4-byte aligned. + AFI->setAlign(2U); + if ((Offset+MBBSize)%4 != 0) + MBBSize += 2; // padding + continue; // Does not get an entry in ImmBranches default: - continue; // Ignore JT branches + continue; // Ignore other JT branches case ARM::Bcc: isCond = true; UOpc = ARM::B; @@ -352,6 +407,16 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn, Bits = 11; Scale = 2; break; + case ARM::t2Bcc: + isCond = true; + UOpc = ARM::t2B; + Bits = 20; + Scale = 2; + break; + case ARM::t2B: + Bits = 24; + Scale = 2; + break; } // Record this immediate branch. @@ -364,16 +429,16 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn, // Scan the instructions for constant pool operands. for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) - if (I->getOperand(op).isConstantPoolIndex()) { + if (I->getOperand(op).isCPI()) { // We found one. The addressing mode tells us the max displacement // from the PC that this instruction permits. - + // Basic size info comes from the TSFlags field. unsigned Bits = 0; unsigned Scale = 1; - unsigned TSFlags = I->getInstrDescriptor()->TSFlags; + unsigned TSFlags = I->getDesc().TSFlags; switch (TSFlags & ARMII::AddrModeMask) { - default: + default: // Constant pool entries can reach anything. if (I->getOpcode() == ARM::CONSTPOOL_ENTRY) continue; @@ -397,46 +462,50 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn, Bits = 8; Scale = 4; // +-(offset_8*4) break; - case ARMII::AddrModeT1: + // addrmode6 has no immediate offset. + case ARMII::AddrModeT1_1: Bits = 5; // +offset_5 break; - case ARMII::AddrModeT2: + case ARMII::AddrModeT1_2: Bits = 5; Scale = 2; // +(offset_5*2) break; - case ARMII::AddrModeT4: + case ARMII::AddrModeT1_4: Bits = 5; Scale = 4; // +(offset_5*4) break; - case ARMII::AddrModeTs: + case ARMII::AddrModeT1_s: Bits = 8; Scale = 4; // +(offset_8*4) break; + case ARMII::AddrModeT2_pc: + Bits = 12; // +-offset_12 + break; } // Remember that this is a user of a CP entry. - unsigned CPI = I->getOperand(op).getConstantPoolIndex(); + unsigned CPI = I->getOperand(op).getIndex(); MachineInstr *CPEMI = CPEMIs[CPI]; - unsigned MaxOffs = ((1 << Bits)-1) * Scale; + unsigned MaxOffs = ((1 << Bits)-1) * Scale; CPUsers.push_back(CPUser(I, CPEMI, MaxOffs)); // Increment corresponding CPEntry reference count. CPEntry *CPE = findConstPoolEntry(CPI, CPEMI); assert(CPE && "Cannot find a corresponding CPEntry!"); CPE->RefCount++; - + // Instructions can only use one CP entry, don't bother scanning the // rest of the operands. break; } } - // In thumb mode, if this block is a constpool island, pessimistically - // assume it needs to be padded by two byte so it's aligned on 4 byte - // boundary. + // In thumb mode, if this block is a constpool island, we may need padding + // so it's aligned on 4 byte boundary. if (isThumb && !MBB.empty() && - MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) + MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY && + (Offset%4) != 0) MBBSize += 2; BBSizes.push_back(MBBSize); @@ -450,17 +519,24 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn, /// around inside the function. unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const { MachineBasicBlock *MBB = MI->getParent(); - + // The offset is composed of two things: the sum of the sizes of all MBB's // before this instruction's block, and the offset from the start of the block // it is in. unsigned Offset = BBOffsets[MBB->getNumber()]; + // If we're looking for a CONSTPOOL_ENTRY in Thumb, see if this block has + // alignment padding, and compensate if so. + if (isThumb && + MI->getOpcode() == ARM::CONSTPOOL_ENTRY && + Offset%4 != 0) + Offset += 2; + // Sum instructions before MI in MBB. for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) { assert(I != MBB->end() && "Didn't find MI in its own basic block?"); if (&*I == MI) return Offset; - Offset += ARM::GetInstSize(I); + Offset += TII->GetInstSizeInBytes(I); } } @@ -477,15 +553,15 @@ static bool CompareMBBNumbers(const MachineBasicBlock *LHS, void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) { // Renumber the MBB's to keep them consequtive. NewBB->getParent()->RenumberBlocks(NewBB); - + // Insert a size into BBSizes to align it properly with the (newly // renumbered) block numbers. BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0); // Likewise for BBOffsets. BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0); - - // Next, update WaterList. Specifically, we need to add NewMBB as having + + // Next, update WaterList. Specifically, we need to add NewMBB as having // available water after it. std::vector::iterator IP = std::lower_bound(WaterList.begin(), WaterList.end(), NewBB, @@ -499,48 +575,53 @@ void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) { /// account for this change and returns the newly created block. MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) { MachineBasicBlock *OrigBB = MI->getParent(); + MachineFunction &MF = *OrigBB->getParent(); // Create a new MBB for the code after the OrigBB. - MachineBasicBlock *NewBB = new MachineBasicBlock(OrigBB->getBasicBlock()); + MachineBasicBlock *NewBB = + MF.CreateMachineBasicBlock(OrigBB->getBasicBlock()); MachineFunction::iterator MBBI = OrigBB; ++MBBI; - OrigBB->getParent()->getBasicBlockList().insert(MBBI, NewBB); - + MF.insert(MBBI, NewBB); + // Splice the instructions starting with MI over to NewBB. NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end()); - + // Add an unconditional branch from OrigBB to NewBB. // Note the new unconditional branch is not being recorded. - BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB); + // There doesn't seem to be meaningful DebugInfo available; this doesn't + // correspond to anything in the source. + BuildMI(OrigBB, DebugLoc::getUnknownLoc(), + TII->get(isThumb ? ((isThumb2) ? ARM::t2B : ARM::tB) : ARM::B)).addMBB(NewBB); NumSplit++; - + // Update the CFG. All succs of OrigBB are now succs of NewBB. while (!OrigBB->succ_empty()) { MachineBasicBlock *Succ = *OrigBB->succ_begin(); OrigBB->removeSuccessor(Succ); NewBB->addSuccessor(Succ); - + // This pass should be run after register allocation, so there should be no // PHI nodes to update. assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI) && "PHI nodes should be eliminated by now!"); } - + // OrigBB branches to NewBB. OrigBB->addSuccessor(NewBB); - + // Update internal data structures to account for the newly inserted MBB. // This is almost the same as UpdateForInsertedWaterBlock, except that // the Water goes after OrigBB, not NewBB. - NewBB->getParent()->RenumberBlocks(NewBB); - + MF.RenumberBlocks(NewBB); + // Insert a size into BBSizes to align it properly with the (newly // renumbered) block numbers. BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0); - + // Likewise for BBOffsets. BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0); - // Next, update WaterList. Specifically, we need to add OrigMBB as having + // Next, update WaterList. Specifically, we need to add OrigMBB as having // available water after it (but not if it's already there, which happens // when splitting before a conditional branch that is followed by an // unconditional branch - in that case we want to insert NewBB). @@ -553,17 +634,18 @@ MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) { else WaterList.insert(IP, OrigBB); - // Figure out how large the first NewMBB is. + // Figure out how large the first NewMBB is. (It cannot + // contain a constpool_entry or tablejump.) unsigned NewBBSize = 0; for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end(); I != E; ++I) - NewBBSize += ARM::GetInstSize(I); - + NewBBSize += TII->GetInstSizeInBytes(I); + unsigned OrigBBI = OrigBB->getNumber(); unsigned NewBBI = NewBB->getNumber(); // Set the size of NewBB in BBSizes. BBSizes[NewBBI] = NewBBSize; - + // We removed instructions from UserMBB, subtract that off from its size. // Add 2 or 4 to the block to count the unconditional branch we added to it. unsigned delta = isThumb ? 2 : 4; @@ -578,10 +660,21 @@ MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) { return NewBB; } -/// OffsetIsInRange - Checks whether UserOffset is within MaxDisp of -/// TrialOffset. -bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset, +/// OffsetIsInRange - Checks whether UserOffset (the location of a constant pool +/// reference) is within MaxDisp of TrialOffset (a proposed location of a +/// constant pool entry). +bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset, unsigned MaxDisp, bool NegativeOK) { + // On Thumb offsets==2 mod 4 are rounded down by the hardware for + // purposes of the displacement computation; compensate for that here. + // Effectively, the valid range of displacements is 2 bytes smaller for such + // references. + if (isThumb && UserOffset%4 !=0) + UserOffset -= 2; + // CPEs will be rounded up to a multiple of 4. + if (isThumb && TrialOffset%4 != 0) + TrialOffset += 2; + if (UserOffset <= TrialOffset) { // User before the Trial. if (TrialOffset-UserOffset <= MaxDisp) @@ -597,21 +690,18 @@ bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset, /// Water (a basic block) will be in range for the specific MI. bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset, - MachineBasicBlock* Water, unsigned MaxDisp) + MachineBasicBlock* Water, CPUser &U) { - unsigned CPEOffset = BBOffsets[Water->getNumber()] + + unsigned MaxDisp = U.MaxDisp; + MachineFunction::iterator I = next(MachineFunction::iterator(Water)); + unsigned CPEOffset = BBOffsets[Water->getNumber()] + BBSizes[Water->getNumber()]; - // If the Water is a constpool island, it has already been aligned. - // If not, align it. - if (isThumb && - (Water->empty() || - Water->begin()->getOpcode() != ARM::CONSTPOOL_ENTRY)) - CPEOffset += 2; // If the CPE is to be inserted before the instruction, that will raise - // the offset of the instruction. + // the offset of the instruction. (Currently applies only to ARM, so + // no alignment compensation attempted here.) if (CPEOffset < UserOffset) - UserOffset += isThumb ? 2 : 4; + UserOffset += U.CPEMI->getOperand(2).getImm(); return OffsetIsInRange (UserOffset, CPEOffset, MaxDisp, !isThumb); } @@ -621,10 +711,8 @@ bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset, bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset, MachineInstr *CPEMI, unsigned MaxDisp, bool DoDump) { - // In thumb mode, pessimistically assumes the .align 2 before the first CPE - // in the island adds two byte padding. - unsigned AlignAdj = isThumb ? 2 : 0; - unsigned CPEOffset = GetOffsetOf(CPEMI) + AlignAdj; + unsigned CPEOffset = GetOffsetOf(CPEMI); + assert(CPEOffset%4 == 0 && "Misaligned CPE"); if (DoDump) { DOUT << "User of CPE#" << CPEMI->getOperand(0).getImm() @@ -637,6 +725,7 @@ bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset, return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, !isThumb); } +#ifndef NDEBUG /// BBIsJumpedOver - Return true of the specified basic block's only predecessor /// unconditionally branches to its only successor. static bool BBIsJumpedOver(MachineBasicBlock *MBB) { @@ -646,21 +735,68 @@ static bool BBIsJumpedOver(MachineBasicBlock *MBB) { MachineBasicBlock *Succ = *MBB->succ_begin(); MachineBasicBlock *Pred = *MBB->pred_begin(); MachineInstr *PredMI = &Pred->back(); - if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB) + if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB + || PredMI->getOpcode() == ARM::t2B) return PredMI->getOperand(0).getMBB() == Succ; return false; } +#endif // NDEBUG -void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta) -{ - MachineFunction::iterator MBBI = BB->getParent()->end(); - for(unsigned i=BB->getNumber()+1; igetParent()->getNumBlockIDs(); i++) +void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB, + int delta) { + MachineFunction::iterator MBBI = BB; MBBI = next(MBBI); + for(unsigned i=BB->getNumber()+1; igetParent()->getNumBlockIDs(); i++) { BBOffsets[i] += delta; + // If some existing blocks have padding, adjust the padding as needed, a + // bit tricky. delta can be negative so don't use % on that. + if (isThumb) { + MachineBasicBlock *MBB = MBBI; + if (!MBB->empty()) { + // Constant pool entries require padding. + if (MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) { + unsigned oldOffset = BBOffsets[i] - delta; + if (oldOffset%4==0 && BBOffsets[i]%4!=0) { + // add new padding + BBSizes[i] += 2; + delta += 2; + } else if (oldOffset%4!=0 && BBOffsets[i]%4==0) { + // remove existing padding + BBSizes[i] -=2; + delta -= 2; + } + } + // Thumb jump tables require padding. They should be at the end; + // following unconditional branches are removed by AnalyzeBranch. + MachineInstr *ThumbJTMI = NULL; + if ((prior(MBB->end())->getOpcode() == ARM::tBR_JTr) + || (prior(MBB->end())->getOpcode() == ARM::t2BR_JTr) + || (prior(MBB->end())->getOpcode() == ARM::t2BR_JTm) + || (prior(MBB->end())->getOpcode() == ARM::t2BR_JTadd)) + ThumbJTMI = prior(MBB->end()); + if (ThumbJTMI) { + unsigned newMIOffset = GetOffsetOf(ThumbJTMI); + unsigned oldMIOffset = newMIOffset - delta; + if (oldMIOffset%4 == 0 && newMIOffset%4 != 0) { + // remove existing padding + BBSizes[i] -= 2; + delta -= 2; + } else if (oldMIOffset%4 != 0 && newMIOffset%4 == 0) { + // add new padding + BBSizes[i] += 2; + delta += 2; + } + } + if (delta==0) + return; + } + MBBI = next(MBBI); + } + } } /// DecrementOldEntry - find the constant pool entry with index CPI /// and instruction CPEMI, and decrement its refcount. If the refcount -/// becomes 0 remove the entry and instruction. Returns true if we removed +/// becomes 0 remove the entry and instruction. Returns true if we removed /// the entry, false if we didn't. bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI) { @@ -694,7 +830,7 @@ int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset) } // No. Look for previously created clones of the CPE that are in range. - unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex(); + unsigned CPI = CPEMI->getOperand(1).getIndex(); std::vector &CPEs = CPEntries[CPI]; for (unsigned i = 0, e = CPEs.size(); i != e; ++i) { // We already tried this one @@ -709,8 +845,8 @@ int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset) U.CPEMI = CPEs[i].CPEMI; // Change the CPI in the instruction operand to refer to the clone. for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j) - if (UserMI->getOperand(j).isConstantPoolIndex()) { - UserMI->getOperand(j).setConstantPoolIndex(CPEs[i].CPI); + if (UserMI->getOperand(j).isCPI()) { + UserMI->getOperand(j).setIndex(CPEs[i].CPI); break; } // Adjust the refcount of the clone... @@ -726,51 +862,75 @@ int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset) /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in /// the specific unconditional branch instruction. static inline unsigned getUnconditionalBrDisp(int Opc) { - return (Opc == ARM::tB) ? ((1<<10)-1)*2 : ((1<<23)-1)*4; + switch (Opc) { + case ARM::tB: + return ((1<<10)-1)*2; + case ARM::t2B: + return ((1<<23)-1)*2; + default: + break; + } + + return ((1<<23)-1)*4; +} + +/// AcceptWater - Small amount of common code factored out of the following. + +MachineBasicBlock* ARMConstantIslands::AcceptWater(MachineBasicBlock *WaterBB, + std::vector::iterator IP) { + DOUT << "found water in range\n"; + // Remove the original WaterList entry; we want subsequent + // insertions in this vicinity to go after the one we're + // about to insert. This considerably reduces the number + // of times we have to move the same CPE more than once. + WaterList.erase(IP); + // CPE goes before following block (NewMBB). + return next(MachineFunction::iterator(WaterBB)); } /// LookForWater - look for an existing entry in the WaterList in which /// we can place the CPE referenced from U so it's within range of U's MI. /// Returns true if found, false if not. If it returns true, *NewMBB -/// is set to the WaterList entry, and *PadNewWater is set to false if -/// the WaterList entry is an island. +/// is set to the WaterList entry. +/// For ARM, we prefer the water that's farthest away. For Thumb, prefer +/// water that will not introduce padding to water that will; within each +/// group, prefer the water that's farthest away. bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset, - bool *PadNewWater, MachineBasicBlock** NewMBB) { + MachineBasicBlock** NewMBB) { + std::vector::iterator IPThatWouldPad; + MachineBasicBlock* WaterBBThatWouldPad = NULL; if (!WaterList.empty()) { for (std::vector::iterator IP = prior(WaterList.end()), B = WaterList.begin();; --IP) { MachineBasicBlock* WaterBB = *IP; - if (WaterIsInRange(UserOffset, WaterBB, U.MaxDisp)) { - DOUT << "found water in range\n"; - // CPE goes before following block (NewMBB). - *NewMBB = next(MachineFunction::iterator(WaterBB)); - // If WaterBB is an island, don't pad the new island. - // If WaterBB is empty, go backwards until we find something that - // isn't. WaterBB may become empty if it's an island whose - // contents were moved farther back. - if (isThumb) { - MachineBasicBlock* BB = WaterBB; - while (BB->empty()) - BB = prior(MachineFunction::iterator(BB)); - if (BB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) - *PadNewWater = false; + if (WaterIsInRange(UserOffset, WaterBB, U)) { + if (isThumb && + (BBOffsets[WaterBB->getNumber()] + + BBSizes[WaterBB->getNumber()])%4 != 0) { + // This is valid Water, but would introduce padding. Remember + // it in case we don't find any Water that doesn't do this. + if (!WaterBBThatWouldPad) { + WaterBBThatWouldPad = WaterBB; + IPThatWouldPad = IP; + } + } else { + *NewMBB = AcceptWater(WaterBB, IP); + return true; } - // Remove the original WaterList entry; we want subsequent - // insertions in this vicinity to go after the one we're - // about to insert. This considerably reduces the number - // of times we have to move the same CPE more than once. - WaterList.erase(IP); - return true; - } + } if (IP == B) break; } } + if (isThumb && WaterBBThatWouldPad) { + *NewMBB = AcceptWater(WaterBBThatWouldPad, IPThatWouldPad); + return true; + } return false; } -/// CreateNewWater - No existing WaterList entry will work for +/// CreateNewWater - No existing WaterList entry will work for /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the /// block is used if in range, and the conditional branch munged so control /// flow is correct. Otherwise the block is split to create a hole with an @@ -778,24 +938,26 @@ bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset, /// block following which the new island can be inserted (the WaterList /// is not adjusted). -void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex, +void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex, unsigned UserOffset, MachineBasicBlock** NewMBB) { CPUser &U = CPUsers[CPUserIndex]; MachineInstr *UserMI = U.MI; MachineInstr *CPEMI = U.CPEMI; MachineBasicBlock *UserMBB = UserMI->getParent(); - unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] + + unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] + BBSizes[UserMBB->getNumber()]; - assert(OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()+1]); + assert(OffsetOfNextBlock== BBOffsets[UserMBB->getNumber()+1]); // If the use is at the end of the block, or the end of the block - // is within range, make new water there. (The +2 or 4 below is - // for the unconditional branch we will be adding. If the block ends in - // an unconditional branch already, it is water, and is known to - // be out of range, so we'll always be adding one.) + // is within range, make new water there. (The addition below is + // for the unconditional branch we will be adding: 4 bytes on ARM, + // 2 on Thumb. Possible Thumb alignment padding is allowed for + // inside OffsetIsInRange. + // If the block ends in an unconditional branch already, it is water, + // and is known to be out of range, so we'll always be adding a branch.) if (&UserMBB->back() == UserMI || - OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb ? 2 : 4), - U.MaxDisp, !isThumb)) { + OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb ? 2: 4), + U.MaxDisp, !isThumb)) { DOUT << "Split at end of block\n"; if (&UserMBB->back() == UserMI) assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!"); @@ -805,10 +967,11 @@ void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex, // range, but if the preceding conditional branch is out of range, the // targets will be exchanged, and the altered branch may be out of // range, so the machinery has to know about it. - int UncondBr = isThumb ? ARM::tB : ARM::B; - BuildMI(UserMBB, TII->get(UncondBr)).addMBB(*NewMBB); + int UncondBr = isThumb ? ((isThumb2) ? ARM::t2B : ARM::tB) : ARM::B; + BuildMI(UserMBB, DebugLoc::getUnknownLoc(), + TII->get(UncondBr)).addMBB(*NewMBB); unsigned MaxDisp = getUnconditionalBrDisp(UncondBr); - ImmBranches.push_back(ImmBranch(&UserMBB->back(), + ImmBranches.push_back(ImmBranch(&UserMBB->back(), MaxDisp, false, UncondBr)); int delta = isThumb ? 2 : 4; BBSizes[UserMBB->getNumber()] += delta; @@ -821,29 +984,34 @@ void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex, // not work well to put CPE as far forward as possible, since then // CPE' cannot immediately follow it (that location is 2 bytes // farther away from I+1 than CPE was from I) and we'd need to create - // a new island. + // a new island. So, we make a first guess, then walk through the + // instructions between the one currently being looked at and the + // possible insertion point, and make sure any other instructions + // that reference CPEs will be able to use the same island area; + // if not, we back up the insertion point. + // The 4 in the following is for the unconditional branch we'll be - // inserting (allows for long branch on Thumb). The 2 or 0 is for - // alignment of the island. - unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4 + (isThumb ? 2 : 0); + // inserting (allows for long branch on Thumb). Alignment of the + // island is handled inside OffsetIsInRange. + unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4; // This could point off the end of the block if we've already got // constant pool entries following this block; only the last one is // in the water list. Back past any possible branches (allow for a // conditional and a maximally long unconditional). if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1]) - BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] - + BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] - (isThumb ? 6 : 8); unsigned EndInsertOffset = BaseInsertOffset + CPEMI->getOperand(2).getImm(); MachineBasicBlock::iterator MI = UserMI; ++MI; unsigned CPUIndex = CPUserIndex+1; - for (unsigned Offset = UserOffset+ARM::GetInstSize(UserMI); + for (unsigned Offset = UserOffset+TII->GetInstSizeInBytes(UserMI); Offset < BaseInsertOffset; - Offset += ARM::GetInstSize(MI), + Offset += TII->GetInstSizeInBytes(MI), MI = next(MI)) { if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) { - if (!OffsetIsInRange(Offset, EndInsertOffset, + if (!OffsetIsInRange(Offset, EndInsertOffset, CPUsers[CPUIndex].MaxDisp, !isThumb)) { BaseInsertOffset -= (isThumb ? 2 : 4); EndInsertOffset -= (isThumb ? 2 : 4); @@ -860,25 +1028,26 @@ void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex, } /// HandleConstantPoolUser - Analyze the specified user, checking to see if it -/// is out-of-range. If so, pick it up the constant pool value and move it some +/// is out-of-range. If so, pick up the constant pool value and move it some /// place in-range. Return true if we changed any addresses (thus must run /// another pass of branch lengthening), false otherwise. -bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, - unsigned CPUserIndex){ +bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, + unsigned CPUserIndex) { CPUser &U = CPUsers[CPUserIndex]; MachineInstr *UserMI = U.MI; MachineInstr *CPEMI = U.CPEMI; - unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex(); + unsigned CPI = CPEMI->getOperand(1).getIndex(); unsigned Size = CPEMI->getOperand(2).getImm(); MachineBasicBlock *NewMBB; - // Compute this only once, it's expensive + // Compute this only once, it's expensive. The 4 or 8 is the value the + // hardware keeps in the PC (2 insns ahead of the reference). unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8); // Special case: tLEApcrel are two instructions MI's. The actual user is the // second instruction. if (UserMI->getOpcode() == ARM::tLEApcrel) UserOffset += 2; - + // See if the current entry is within range, or there is a clone of it // in range. int result = LookForExistingCPEntry(U, UserOffset); @@ -887,22 +1056,21 @@ bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, // No existing clone of this CPE is within range. // We will be generating a new clone. Get a UID for it. - unsigned ID = NextUID++; + unsigned ID = AFI->createConstPoolEntryUId(); // Look for water where we can place this CPE. We look for the farthest one // away that will work. Forward references only for now (although later // we might find some that are backwards). - bool PadNewWater = true; - if (!LookForWater(U, UserOffset, &PadNewWater, &NewMBB)) { + if (!LookForWater(U, UserOffset, &NewMBB)) { // No water found. DOUT << "No water found\n"; CreateNewWater(CPUserIndex, UserOffset, &NewMBB); } // Okay, we know we can put an island before NewMBB now, do it! - MachineBasicBlock *NewIsland = new MachineBasicBlock(); - Fn.getBasicBlockList().insert(NewMBB, NewIsland); + MachineBasicBlock *NewIsland = Fn.CreateMachineBasicBlock(); + Fn.insert(NewMBB, NewIsland); // Update internal data structures to account for the newly inserted MBB. UpdateForInsertedWaterBlock(NewIsland); @@ -912,27 +1080,29 @@ bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, // Now that we have an island to add the CPE to, clone the original CPE and // add it to the island. - U.CPEMI = BuildMI(NewIsland, TII->get(ARM::CONSTPOOL_ENTRY)) + U.CPEMI = BuildMI(NewIsland, DebugLoc::getUnknownLoc(), + TII->get(ARM::CONSTPOOL_ENTRY)) .addImm(ID).addConstantPoolIndex(CPI).addImm(Size); CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1)); NumCPEs++; + BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()]; // Compensate for .align 2 in thumb mode. - if (isThumb && PadNewWater) Size += 2; + if (isThumb && BBOffsets[NewIsland->getNumber()]%4 != 0) + Size += 2; // Increase the size of the island block to account for the new entry. BBSizes[NewIsland->getNumber()] += Size; - BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()]; AdjustBBOffsetsAfter(NewIsland, Size); - + // Finally, change the CPI in the instruction operand to be ID. for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i) - if (UserMI->getOperand(i).isConstantPoolIndex()) { - UserMI->getOperand(i).setConstantPoolIndex(ID); + if (UserMI->getOperand(i).isCPI()) { + UserMI->getOperand(i).setIndex(ID); break; } - + DOUT << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" << *UserMI; - + return true; } @@ -940,28 +1110,26 @@ bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, /// sizes and offsets of impacted basic blocks. void ARMConstantIslands::RemoveDeadCPEMI(MachineInstr *CPEMI) { MachineBasicBlock *CPEBB = CPEMI->getParent(); + unsigned Size = CPEMI->getOperand(2).getImm(); + CPEMI->eraseFromParent(); + BBSizes[CPEBB->getNumber()] -= Size; + // All succeeding offsets have the current size value added in, fix this. if (CPEBB->empty()) { - // In thumb mode, the size of island is padded by two to compensate for - // the alignment requirement. Thus it will now be 2 when the block is + // In thumb mode, the size of island may be padded by two to compensate for + // the alignment requirement. Then it will now be 2 when the block is // empty, so fix this. // All succeeding offsets have the current size value added in, fix this. if (BBSizes[CPEBB->getNumber()] != 0) { - AdjustBBOffsetsAfter(CPEBB, -BBSizes[CPEBB->getNumber()]); + Size += BBSizes[CPEBB->getNumber()]; BBSizes[CPEBB->getNumber()] = 0; } - // An island has only one predecessor BB and one successor BB. Check if - // this BB's predecessor jumps directly to this BB's successor. This - // shouldn't happen currently. - assert(!BBIsJumpedOver(CPEBB) && "How did this happen?"); - // FIXME: remove the empty blocks after all the work is done? - } else { - unsigned Size = CPEMI->getOperand(2).getImm(); - BBSizes[CPEBB->getNumber()] -= Size; - // All succeeding offsets have the current size value added in, fix this. - AdjustBBOffsetsAfter(CPEBB, -Size); } - - CPEMI->eraseFromParent(); + AdjustBBOffsetsAfter(CPEBB, -Size); + // An island has only one predecessor BB and one successor BB. Check if + // this BB's predecessor jumps directly to this BB's successor. This + // shouldn't happen currently. + assert(!BBIsJumpedOver(CPEBB) && "How did this happen?"); + // FIXME: remove the empty blocks after all the work is done? } /// RemoveUnusedCPEntries - Remove constant pool entries whose refcounts @@ -977,7 +1145,7 @@ bool ARMConstantIslands::RemoveUnusedCPEntries() { MadeChange = true; } } - } + } return MadeChange; } @@ -992,16 +1160,25 @@ bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB, DOUT << "Branch of destination BB#" << DestBB->getNumber() << " from BB#" << MI->getParent()->getNumber() << " max delta=" << MaxDisp - << " at offset " << int(DestOffset-BrOffset) << "\t" << *MI; + << " from " << GetOffsetOf(MI) << " to " << DestOffset + << " offset " << int(DestOffset-BrOffset) << "\t" << *MI; - return OffsetIsInRange(BrOffset, DestOffset, MaxDisp, true); + if (BrOffset <= DestOffset) { + // Branch before the Dest. + if (DestOffset-BrOffset <= MaxDisp) + return true; + } else { + if (BrOffset-DestOffset <= MaxDisp) + return true; + } + return false; } /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far /// away to fit in its displacement field. bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) { MachineInstr *MI = Br.MI; - MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock(); + MachineBasicBlock *DestBB = MI->getOperand(0).getMBB(); // Check to see if the DestBB is already in-range. if (BBIsInRange(MI, DestBB, Br.MaxDisp)) @@ -1015,16 +1192,16 @@ bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) { /// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is /// too far away to fit in its displacement field. If the LR register has been /// spilled in the epilogue, then we can use BL to implement a far jump. -/// Otherwise, add an intermediate branch instruction to to a branch. +/// Otherwise, add an intermediate branch instruction to a branch. bool ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) { MachineInstr *MI = Br.MI; MachineBasicBlock *MBB = MI->getParent(); - assert(isThumb && "Expected a Thumb function!"); + assert(isThumb && !isThumb2 && "Expected a Thumb-1 function!"); // Use BL to implement far jump. Br.MaxDisp = (1 << 21) * 2; - MI->setInstrDescriptor(TII->get(ARM::tBfar)); + MI->setDesc(TII->get(ARM::tBfar)); BBSizes[MBB->getNumber()] += 2; AdjustBBOffsetsAfter(MBB, 2); HasFarJump = true; @@ -1041,17 +1218,18 @@ ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) { bool ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) { MachineInstr *MI = Br.MI; - MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock(); + MachineBasicBlock *DestBB = MI->getOperand(0).getMBB(); - // Add a unconditional branch to the destination and invert the branch + // Add an unconditional branch to the destination and invert the branch // condition to jump over it: // blt L1 // => // bge L2 // b L1 // L2: - ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImmedValue(); + ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImm(); CC = ARMCC::getOppositeCondition(CC); + unsigned CCReg = MI->getOperand(2).getReg(); // If the branch is at the end of its MBB and that has a fall-through block, // direct the updated conditional branch to the fall-through block. Otherwise, @@ -1062,20 +1240,20 @@ ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) { NumCBrFixed++; if (BMI != MI) { - if (next(MachineBasicBlock::iterator(MI)) == MBB->back() && + if (next(MachineBasicBlock::iterator(MI)) == prior(MBB->end()) && BMI->getOpcode() == Br.UncondBr) { - // Last MI in the BB is a unconditional branch. Can we simply invert the + // Last MI in the BB is an unconditional branch. Can we simply invert the // condition and swap destinations: // beq L1 // b L2 // => // bne L2 // b L1 - MachineBasicBlock *NewDest = BMI->getOperand(0).getMachineBasicBlock(); + MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB(); if (BBIsInRange(MI, NewDest, Br.MaxDisp)) { DOUT << " Invert Bcc condition and swap its destination with " << *BMI; - BMI->getOperand(0).setMachineBasicBlock(DestBB); - MI->getOperand(0).setMachineBasicBlock(NewDest); + BMI->getOperand(0).setMBB(DestBB); + MI->getOperand(0).setMBB(NewDest); MI->getOperand(1).setImm(CC); return true; } @@ -1084,35 +1262,39 @@ ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) { if (NeedSplit) { SplitBlockBeforeInstr(MI); - // No need for the branch to the next block. We're adding a unconditional + // No need for the branch to the next block. We're adding an unconditional // branch to the destination. - int delta = ARM::GetInstSize(&MBB->back()); + int delta = TII->GetInstSizeInBytes(&MBB->back()); BBSizes[MBB->getNumber()] -= delta; - AdjustBBOffsetsAfter(MBB, -delta); + MachineBasicBlock* SplitBB = next(MachineFunction::iterator(MBB)); + AdjustBBOffsetsAfter(SplitBB, -delta); MBB->back().eraseFromParent(); + // BBOffsets[SplitBB] is wrong temporarily, fixed below } MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB)); - + DOUT << " Insert B to BB#" << DestBB->getNumber() << " also invert condition and change dest. to BB#" << NextBB->getNumber() << "\n"; // Insert a new conditional branch and a new unconditional branch. // Also update the ImmBranch as well as adding a new entry for the new branch. - BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC); + BuildMI(MBB, DebugLoc::getUnknownLoc(), + TII->get(MI->getOpcode())) + .addMBB(NextBB).addImm(CC).addReg(CCReg); Br.MI = &MBB->back(); - BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back()); - BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB); - BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back()); + BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back()); + BuildMI(MBB, DebugLoc::getUnknownLoc(), TII->get(Br.UncondBr)).addMBB(DestBB); + BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back()); unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr); ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr)); // Remove the old conditional branch. It may or may not still be in MBB. - BBSizes[MI->getParent()->getNumber()] -= ARM::GetInstSize(MI); + BBSizes[MI->getParent()->getNumber()] -= TII->GetInstSizeInBytes(MI); MI->eraseFromParent(); // The net size change is an addition of one unconditional branch. - int delta = ARM::GetInstSize(&MBB->back()); + int delta = TII->GetInstSizeInBytes(&MBB->back()); AdjustBBOffsetsAfter(MBB, delta); return true; } @@ -1123,12 +1305,12 @@ bool ARMConstantIslands::UndoLRSpillRestore() { bool MadeChange = false; for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) { MachineInstr *MI = PushPopMIs[i]; - if (MI->getNumOperands() == 1) { - if (MI->getOpcode() == ARM::tPOP_RET && - MI->getOperand(0).getReg() == ARM::PC) - BuildMI(MI->getParent(), TII->get(ARM::tBX_RET)); - MI->eraseFromParent(); - MadeChange = true; + if (MI->getOpcode() == ARM::tPOP_RET && + MI->getOperand(0).getReg() == ARM::PC && + MI->getNumExplicitOperands() == 1) { + BuildMI(MI->getParent(), MI->getDebugLoc(), TII->get(ARM::tBX_RET)); + MI->eraseFromParent(); + MadeChange = true; } } return MadeChange;