X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FARM%2FARMJITInfo.cpp;h=45b7e48d0cfb7513eef55f31ca69ff24bf3a8e4f;hb=3a96122c4ae4e7727ba976a9f658626c18997689;hp=52036ba35177c08ac1afee2fbe535c6c5e7b6455;hpb=437c1738ef0ca451b710c31c87166f6abfd04ec7;p=oota-llvm.git diff --git a/lib/Target/ARM/ARMJITInfo.cpp b/lib/Target/ARM/ARMJITInfo.cpp index 52036ba3517..45b7e48d0cf 100644 --- a/lib/Target/ARM/ARMJITInfo.cpp +++ b/lib/Target/ARM/ARMJITInfo.cpp @@ -13,19 +13,21 @@ #define DEBUG_TYPE "jit" #include "ARMJITInfo.h" +#include "ARMInstrInfo.h" #include "ARMConstantPoolValue.h" #include "ARMRelocations.h" #include "ARMSubtarget.h" #include "llvm/Function.h" -#include "llvm/CodeGen/MachineCodeEmitter.h" -#include "llvm/Config/alloca.h" -#include "llvm/Support/Streams.h" -#include "llvm/System/Memory.h" +#include "llvm/CodeGen/JITCodeEmitter.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/Support/Memory.h" #include using namespace llvm; void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) { - abort(); + report_fatal_error("ARMJITInfo::replaceMachineCodeForFunction"); } /// JITCompilerFunction - This contains the address of the JIT function used to @@ -41,13 +43,13 @@ static TargetJITInfo::JITCompilerFn JITCompilerFunction; #define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__) // CompilationCallback stub - We can't use a C function with inline assembly in -// it, because we the prolog/epilog inserted by GCC won't work for us (we need +// it, because the prolog/epilog inserted by GCC won't work for us. (We need // to preserve more context and manipulate the stack directly). Instead, -// write our own wrapper, which does things our way, so we have complete +// write our own wrapper, which does things our way, so we have complete // control over register saving and restoring. extern "C" { #if defined(__arm__) - void ARMCompilationCallback(void); + void ARMCompilationCallback(); asm( ".text\n" ".align 2\n" @@ -58,6 +60,9 @@ extern "C" { // whole compilation callback doesn't exist as far as the caller is // concerned, so we can't just preserve the callee saved regs. "stmdb sp!, {r0, r1, r2, r3, lr}\n" +#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) + "fstmfdd sp!, {d0, d1, d2, d3, d4, d5, d6, d7}\n" +#endif // The LR contains the address of the stub function on entry. // pass it as the argument to the C part of the callback "mov r0, lr\n" @@ -72,10 +77,16 @@ extern "C" { // order for the registers. // +--------+ // 0 | LR | Original return address - // +--------+ + // +--------+ // 1 | LR | Stub address (start of stub) // 2-5 | R3..R0 | Saved registers (we need to preserve all regs) - // +--------+ + // 6-20 | D0..D7 | Saved VFP registers + // +--------+ + // +#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) + // Restore VFP caller-saved registers. + "fldmfdd sp!, {d0, d1, d2, d3, d4, d5, d6, d7}\n" +#endif // // We need to exchange the values in slots 0 and 1 so we can // return to the address in slot 1 with the address in slot 0 @@ -86,21 +97,21 @@ extern "C" { "str r0, [sp,#16]\n" // Return to the (newly modified) stub to invoke the real function. // The above twiddling of the saved return addresses allows us to - // deallocate everything, including the LR the stub saved, all in one - // pop instruction. - "ldmia sp!, {r0, r1, r2, r3, lr, pc}\n" + // deallocate everything, including the LR the stub saved, with two + // updating load instructions. + "ldmia sp!, {r0, r1, r2, r3, lr}\n" + "ldr pc, [sp], #4\n" ); #else // Not an ARM host void ARMCompilationCallback() { - assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n"); - abort(); + llvm_unreachable("Cannot call ARMCompilationCallback() on a non-ARM arch!"); } #endif } -/// ARMCompilationCallbackC - This is the target-specific function invoked -/// by the function stub when we did not know the real target of a call. -/// This function must locate the start of the stub or call site and pass +/// ARMCompilationCallbackC - This is the target-specific function invoked +/// by the function stub when we did not know the real target of a call. +/// This function must locate the start of the stub or call site and pass /// it into the JIT compiler function. extern "C" void ARMCompilationCallbackC(intptr_t StubAddr) { // Get the address of the compiled code for this function. @@ -111,20 +122,14 @@ extern "C" void ARMCompilationCallbackC(intptr_t StubAddr) { // stub with: // ldr pc, [pc,#-4] // - bool ok = sys::Memory::setRangeWritable((void*)StubAddr, 8); - if (!ok) - { - cerr << "ERROR: Unable to mark stub writable\n"; - abort(); - } - *(intptr_t *)StubAddr = 0xe51ff004; + if (!sys::Memory::setRangeWritable((void*)StubAddr, 8)) { + llvm_unreachable("ERROR: Unable to mark stub writable"); + } + *(intptr_t *)StubAddr = 0xe51ff004; // ldr pc, [pc, #-4] *(intptr_t *)(StubAddr+4) = NewVal; - ok = sys::Memory::setRangeExecutable((void*)StubAddr, 8); - if (!ok) - { - cerr << "ERROR: Unable to mark stub executable\n"; - abort(); - } + if (!sys::Memory::setRangeExecutable((void*)StubAddr, 8)) { + llvm_unreachable("ERROR: Unable to mark stub executable"); + } } TargetJITInfo::LazyResolverFn @@ -133,65 +138,127 @@ ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) { return ARMCompilationCallback; } +void *ARMJITInfo::emitGlobalValueIndirectSym(const GlobalValue *GV, void *Ptr, + JITCodeEmitter &JCE) { + uint8_t Buffer[4]; + uint8_t *Cur = Buffer; + MachineCodeEmitter::emitWordLEInto(Cur, (intptr_t)Ptr); + void *PtrAddr = JCE.allocIndirectGV( + GV, Buffer, sizeof(Buffer), /*Alignment=*/4); + addIndirectSymAddr(Ptr, (intptr_t)PtrAddr); + return PtrAddr; +} + +TargetJITInfo::StubLayout ARMJITInfo::getStubLayout() { + // The stub contains up to 3 4-byte instructions, aligned at 4 bytes, and a + // 4-byte address. See emitFunctionStub for details. + StubLayout Result = {16, 4}; + return Result; +} + void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn, - MachineCodeEmitter &MCE) { - unsigned addr = (intptr_t)Fn; + JITCodeEmitter &JCE) { + void *Addr; // If this is just a call to an external function, emit a branch instead of a // call. The code is the same except for one bit of the last instruction. if (Fn != (void*)(intptr_t)ARMCompilationCallback) { - // branch to the corresponding function addr - // the stub is 8-byte size and 4-aligned - MCE.startFunctionStub(F, 8, 4); - MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4] - MCE.emitWordLE(addr); // addr of function + // Branch to the corresponding function addr. + if (IsPIC) { + // The stub is 16-byte size and 4-aligned. + intptr_t LazyPtr = getIndirectSymAddr(Fn); + if (!LazyPtr) { + // In PIC mode, the function stub is loading a lazy-ptr. + LazyPtr= (intptr_t)emitGlobalValueIndirectSym((GlobalValue*)F, Fn, JCE); + DEBUG(if (F) + errs() << "JIT: Indirect symbol emitted at [" << LazyPtr + << "] for GV '" << F->getName() << "'\n"; + else + errs() << "JIT: Stub emitted at [" << LazyPtr + << "] for external function at '" << Fn << "'\n"); + } + JCE.emitAlignment(4); + Addr = (void*)JCE.getCurrentPCValue(); + if (!sys::Memory::setRangeWritable(Addr, 16)) { + llvm_unreachable("ERROR: Unable to mark stub writable"); + } + JCE.emitWordLE(0xe59fc004); // ldr ip, [pc, #+4] + JCE.emitWordLE(0xe08fc00c); // L_func$scv: add ip, pc, ip + JCE.emitWordLE(0xe59cf000); // ldr pc, [ip] + JCE.emitWordLE(LazyPtr - (intptr_t(Addr)+4+8)); // func - (L_func$scv+8) + sys::Memory::InvalidateInstructionCache(Addr, 16); + if (!sys::Memory::setRangeExecutable(Addr, 16)) { + llvm_unreachable("ERROR: Unable to mark stub executable"); + } + } else { + // The stub is 8-byte size and 4-aligned. + JCE.emitAlignment(4); + Addr = (void*)JCE.getCurrentPCValue(); + if (!sys::Memory::setRangeWritable(Addr, 8)) { + llvm_unreachable("ERROR: Unable to mark stub writable"); + } + JCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4] + JCE.emitWordLE((intptr_t)Fn); // addr of function + sys::Memory::InvalidateInstructionCache(Addr, 8); + if (!sys::Memory::setRangeExecutable(Addr, 8)) { + llvm_unreachable("ERROR: Unable to mark stub executable"); + } + } } else { // The compilation callback will overwrite the first two words of this - // stub with indirect branch instructions targeting the compiled code. + // stub with indirect branch instructions targeting the compiled code. // This stub sets the return address to restart the stub, so that // the new branch will be invoked when we come back. // - // branch and link to the compilation callback. - // the stub is 16-byte size and 4-byte aligned. - MCE.startFunctionStub(F, 16, 4); + // Branch and link to the compilation callback. + // The stub is 16-byte size and 4-byte aligned. + JCE.emitAlignment(4); + Addr = (void*)JCE.getCurrentPCValue(); + if (!sys::Memory::setRangeWritable(Addr, 16)) { + llvm_unreachable("ERROR: Unable to mark stub writable"); + } // Save LR so the callback can determine which stub called it. // The compilation callback is responsible for popping this prior // to returning. - MCE.emitWordLE(0xe92d4000); // PUSH {lr} - // Set the return address to go back to the start of this stub - MCE.emitWordLE(0xe24fe00c); // SUB LR, PC, #12 - // Invoke the compilation callback - MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4] - // The address of the compilation callback - MCE.emitWordLE((intptr_t)ARMCompilationCallback); + JCE.emitWordLE(0xe92d4000); // push {lr} + // Set the return address to go back to the start of this stub. + JCE.emitWordLE(0xe24fe00c); // sub lr, pc, #12 + // Invoke the compilation callback. + JCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4] + // The address of the compilation callback. + JCE.emitWordLE((intptr_t)ARMCompilationCallback); + sys::Memory::InvalidateInstructionCache(Addr, 16); + if (!sys::Memory::setRangeExecutable(Addr, 16)) { + llvm_unreachable("ERROR: Unable to mark stub executable"); + } } - return MCE.finishFunctionStub(F); + return Addr; } intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const { ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType(); - if (RT == ARM::reloc_arm_pic_jt) + switch (RT) { + default: + return (intptr_t)(MR->getResultPointer()); + case ARM::reloc_arm_pic_jt: // Destination address - jump table base. return (intptr_t)(MR->getResultPointer()) - MR->getConstantVal(); - else if (RT == ARM::reloc_arm_jt_base) + case ARM::reloc_arm_jt_base: // Jump table base address. return getJumpTableBaseAddr(MR->getJumpTableIndex()); - else if (RT == ARM::reloc_arm_cp_entry) + case ARM::reloc_arm_cp_entry: + case ARM::reloc_arm_vfp_cp_entry: // Constant pool entry address. return getConstantPoolEntryAddr(MR->getConstantPoolIndex()); - else if (RT == ARM::reloc_arm_machine_cp_entry) { - const MachineConstantPoolEntry &MCPE = (*MCPEs)[MR->getConstantVal()]; - assert(MCPE.isMachineConstantPoolEntry() && - "Expecting a machine constant pool entry!"); - ARMConstantPoolValue *ACPV = - static_cast(MCPE.Val.MachineCPVal); + case ARM::reloc_arm_machine_cp_entry: { + ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)MR->getConstantVal(); assert((!ACPV->hasModifier() && !ACPV->mustAddCurrentAddress()) && "Can't handle this machine constant pool entry yet!"); intptr_t Addr = (intptr_t)(MR->getResultPointer()); Addr -= getPCLabelAddr(ACPV->getLabelId()) + ACPV->getPCAdjustment(); return Addr; } - return (intptr_t)(MR->getResultPointer()); + } } /// relocate - Before the JIT can run a block of code that has been emitted, @@ -204,30 +271,34 @@ void ARMJITInfo::relocate(void *Function, MachineRelocation *MR, intptr_t ResultPtr = resolveRelocDestAddr(MR); switch ((ARM::RelocationType)MR->getRelocationType()) { case ARM::reloc_arm_cp_entry: + case ARM::reloc_arm_vfp_cp_entry: case ARM::reloc_arm_relative: { // It is necessary to calculate the correct PC relative value. We // subtract the base addr from the target addr to form a byte offset. - ResultPtr = ResultPtr-(intptr_t)RelocPos-8; + ResultPtr = ResultPtr - (intptr_t)RelocPos - 8; // If the result is positive, set bit U(23) to 1. if (ResultPtr >= 0) - *((unsigned*)RelocPos) |= 1 << 23; + *((intptr_t*)RelocPos) |= 1 << ARMII::U_BitShift; else { - // Otherwise, obtain the absolute value and set - // bit U(23) to 0. - ResultPtr *= -1; - *((unsigned*)RelocPos) &= 0xFF7FFFFF; + // Otherwise, obtain the absolute value and set bit U(23) to 0. + *((intptr_t*)RelocPos) &= ~(1 << ARMII::U_BitShift); + ResultPtr = - ResultPtr; } // Set the immed value calculated. - *((unsigned*)RelocPos) |= (unsigned)ResultPtr; + // VFP immediate offset is multiplied by 4. + if (MR->getRelocationType() == ARM::reloc_arm_vfp_cp_entry) + ResultPtr = ResultPtr >> 2; + *((intptr_t*)RelocPos) |= ResultPtr; // Set register Rn to PC. - *((unsigned*)RelocPos) |= 0xF << 16; + *((intptr_t*)RelocPos) |= + getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift; break; } case ARM::reloc_arm_pic_jt: case ARM::reloc_arm_machine_cp_entry: case ARM::reloc_arm_absolute: { // These addresses have already been resolved. - *((unsigned*)RelocPos) |= (unsigned)ResultPtr; + *((intptr_t*)RelocPos) |= (intptr_t)ResultPtr; break; } case ARM::reloc_arm_branch: { @@ -239,13 +310,25 @@ void ARMJITInfo::relocate(void *Function, MachineRelocation *MR, ResultPtr = ResultPtr - (intptr_t)RelocPos - 8; ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2; assert(ResultPtr >= -33554432 && ResultPtr <= 33554428); - *((unsigned*)RelocPos) |= ResultPtr; + *((intptr_t*)RelocPos) |= ResultPtr; break; } case ARM::reloc_arm_jt_base: { // JT base - (instruction addr + 8) ResultPtr = ResultPtr - (intptr_t)RelocPos - 8; - *((unsigned*)RelocPos) |= ResultPtr; + *((intptr_t*)RelocPos) |= ResultPtr; + break; + } + case ARM::reloc_arm_movw: { + ResultPtr = ResultPtr & 0xFFFF; + *((intptr_t*)RelocPos) |= ResultPtr & 0xFFF; + *((intptr_t*)RelocPos) |= ((ResultPtr >> 12) & 0xF) << 16; + break; + } + case ARM::reloc_arm_movt: { + ResultPtr = (ResultPtr >> 16) & 0xFFFF; + *((intptr_t*)RelocPos) |= ResultPtr & 0xFFF; + *((intptr_t*)RelocPos) |= ((ResultPtr >> 12) & 0xF) << 16; break; } }