X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FARM%2FARMTargetMachine.h;h=20ca97b616b7f39d057a26ef6bf1fee871e100fb;hb=1106660066504d163543607b38371c97aef7708e;hp=35f97e3bc8853caf8ce7d2aab5b2222587628a50;hpb=cb3718832375a581c5ea23f15918f3ea447a446c;p=oota-llvm.git diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index 35f97e3bc88..20ca97b616b 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -11,80 +11,117 @@ // //===----------------------------------------------------------------------===// -#ifndef ARMTARGETMACHINE_H -#define ARMTARGETMACHINE_H +#ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H +#define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetData.h" -#include "llvm/Target/TargetFrameInfo.h" #include "ARMInstrInfo.h" -#include "ARMFrameInfo.h" -#include "ARMJITInfo.h" #include "ARMSubtarget.h" -#include "ARMISelLowering.h" +#include "llvm/IR/DataLayout.h" +#include "llvm/Target/TargetMachine.h" namespace llvm { -class Module; - -class ARMTargetMachine : public LLVMTargetMachine { - ARMSubtarget Subtarget; - const TargetData DataLayout; // Calculates type size & alignment - ARMInstrInfo InstrInfo; - ARMFrameInfo FrameInfo; - ARMJITInfo JITInfo; - ARMTargetLowering TLInfo; +class ARMBaseTargetMachine : public LLVMTargetMachine { +public: + enum ARMABI { + ARM_ABI_UNKNOWN, + ARM_ABI_APCS, + ARM_ABI_AAPCS // ARM EABI + } TargetABI; protected: - // To avoid having target depend on the asmprinter stuff libraries, asmprinter - // set this functions to ctor pointer at startup time if they are linked in. - typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, - ARMTargetMachine &tm); - static AsmPrinterCtorFn AsmPrinterCtor; + std::unique_ptr TLOF; + ARMSubtarget Subtarget; + bool isLittle; + mutable StringMap> SubtargetMap; public: - ARMTargetMachine(const Module &M, const std::string &FS, bool isThumb = false); + ARMBaseTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL, + bool isLittle); + ~ARMBaseTargetMachine() override; - virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; } - virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; } - virtual ARMJITInfo *getJITInfo() { return &JITInfo; } - virtual const ARMRegisterInfo *getRegisterInfo() const { - return &InstrInfo.getRegisterInfo(); - } - virtual const TargetData *getTargetData() const { return &DataLayout; } - virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; } - virtual ARMTargetLowering *getTargetLowering() const { - return const_cast(&TLInfo); - } + const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; } + const ARMSubtarget *getSubtargetImpl(const Function &F) const override; + bool isLittleEndian() const { return isLittle; } + + /// \brief Get the TargetIRAnalysis for this target. + TargetIRAnalysis getTargetIRAnalysis() override; - static void registerAsmPrinter(AsmPrinterCtorFn F) { - AsmPrinterCtor = F; + // Pass Pipeline Configuration + TargetPassConfig *createPassConfig(PassManagerBase &PM) override; + + TargetLoweringObjectFile *getObjFileLowering() const override { + return TLOF.get(); } +}; - static unsigned getModuleMatchQuality(const Module &M); - static unsigned getJITMatchQuality(); +/// ARMTargetMachine - ARM target machine. +/// +class ARMTargetMachine : public ARMBaseTargetMachine { + virtual void anchor(); + public: + ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, + const TargetOptions &Options, Reloc::Model RM, + CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle); +}; - virtual const TargetAsmInfo *createTargetAsmInfo() const; +/// ARMLETargetMachine - ARM little endian target machine. +/// +class ARMLETargetMachine : public ARMTargetMachine { + void anchor() override; +public: + ARMLETargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); +}; - // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, - raw_ostream &Out); - virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast, - bool DumpAsm, MachineCodeEmitter &MCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, - bool DumpAsm, MachineCodeEmitter &MCE); +/// ARMBETargetMachine - ARM big endian target machine. +/// +class ARMBETargetMachine : public ARMTargetMachine { + void anchor() override; +public: + ARMBETargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, + const TargetOptions &Options, Reloc::Model RM, + CodeModel::Model CM, CodeGenOpt::Level OL); }; /// ThumbTargetMachine - Thumb target machine. +/// Due to the way architectures are handled, this represents both +/// Thumb-1 and Thumb-2. +/// +class ThumbTargetMachine : public ARMBaseTargetMachine { + virtual void anchor(); +public: + ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, + const TargetOptions &Options, Reloc::Model RM, + CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle); +}; + +/// ThumbLETargetMachine - Thumb little endian target machine. /// -class ThumbTargetMachine : public ARMTargetMachine { +class ThumbLETargetMachine : public ThumbTargetMachine { + void anchor() override; public: - ThumbTargetMachine(const Module &M, const std::string &FS); + ThumbLETargetMachine(const Target &T, StringRef TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); +}; - static unsigned getJITMatchQuality(); - static unsigned getModuleMatchQuality(const Module &M); +/// ThumbBETargetMachine - Thumb big endian target machine. +/// +class ThumbBETargetMachine : public ThumbTargetMachine { + void anchor() override; +public: + ThumbBETargetMachine(const Target &T, StringRef TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); }; } // end namespace llvm