X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FCellSPU%2FSPUInstrInfo.h;h=ffb40875ff10316a143fc55a59ad1eab905ebfb6;hb=baeb911d60401818dc9fe0db6182cd048e4fdd03;hp=bc57e155e535e84f4c66f7f6882fe8e3de6a4b55;hpb=52d0001cfc7cc83c69f20430cf9039a798adc10b;p=oota-llvm.git

diff --git a/lib/Target/CellSPU/SPUInstrInfo.h b/lib/Target/CellSPU/SPUInstrInfo.h
index bc57e155e53..ffb40875ff1 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.h
+++ b/lib/Target/CellSPU/SPUInstrInfo.h
@@ -45,16 +45,11 @@ namespace llvm {
     ///
     virtual const SPURegisterInfo &getRegisterInfo() const { return RI; }
 
-    /// getPointerRegClass - Return the register class to use to hold pointers.
-    /// This is used for addressing modes.
-    virtual const TargetRegisterClass *getPointerRegClass() const;
-
-    // Return true if the instruction is a register to register move and
-    // leave the source and dest operands in the passed parameters.
-    //
-    virtual bool isMoveInstr(const MachineInstr& MI,
-                             unsigned& sourceReg,
-                             unsigned& destReg) const;
+    /// Return true if the instruction is a register to register move and return
+    /// the source and dest operands and their sub-register indices by reference.
+    virtual bool isMoveInstr(const MachineInstr &MI,
+                             unsigned &SrcReg, unsigned &DstReg,
+                             unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
 
     unsigned isLoadFromStackSlot(const MachineInstr *MI,
                                  int &FrameIndex) const;
@@ -104,14 +99,15 @@ namespace llvm {
     bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
 
     virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
-			       MachineBasicBlock *&FBB,
-			       SmallVectorImpl<MachineOperand> &Cond) const;
+                               MachineBasicBlock *&FBB,
+                               SmallVectorImpl<MachineOperand> &Cond,
+                               bool AllowModify) const;
 
     virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
 
     virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
-			      MachineBasicBlock *FBB,
-			      const SmallVectorImpl<MachineOperand> &Cond) const;
+                              MachineBasicBlock *FBB,
+                              const SmallVectorImpl<MachineOperand> &Cond) const;
    };
 }