X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FCellSPU%2FSPURegisterInfo.h;h=b7818a47abd7e821ca08432344fbdb39818f7654;hb=d9190c0f148b218ab046deadd0c7ae475414cde5;hp=382bfdd5477275134e315b46f31d685d0e50ac4c;hpb=4ee451de366474b9c228b4e5fa573795a715216d;p=oota-llvm.git diff --git a/lib/Target/CellSPU/SPURegisterInfo.h b/lib/Target/CellSPU/SPURegisterInfo.h index 382bfdd5477..b7818a47abd 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.h +++ b/lib/Target/CellSPU/SPURegisterInfo.h @@ -7,7 +7,8 @@ // //===----------------------------------------------------------------------===// // -// This file contains the Cell SPU implementation of the MRegisterInfo class. +// This file contains the Cell SPU implementation of the TargetRegisterInfo +// class. // //===----------------------------------------------------------------------===// @@ -15,7 +16,9 @@ #define SPU_REGISTERINFO_H #include "SPU.h" -#include "SPUGenRegisterInfo.h.inc" + +#define GET_REGINFO_HEADER +#include "SPUGenRegisterInfo.inc" namespace llvm { class SPUSubtarget; @@ -32,7 +35,7 @@ namespace llvm { public: SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii); - + //! Translate a register's enum value to a register number /*! This method translates a register's enum value to it's regiser number, @@ -40,100 +43,58 @@ namespace llvm { */ static unsigned getRegisterNumbering(unsigned RegEnum); - //! Store a register to a stack slot, based on its register class. - void storeRegToStackSlot(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, - unsigned SrcReg, bool isKill, int FrameIndex, - const TargetRegisterClass *RC) const; - - //! Store a register to an address, based on its register class - void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, - SmallVectorImpl &Addr, - const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs) const; - - //! Load a register from a stack slot, based on its register class. - void loadRegFromStackSlot(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIndex, - const TargetRegisterClass *RC) const; - - //! Loqad a register from an address, based on its register class - virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, - SmallVectorImpl &Addr, - const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs) const; - - //! Copy a register to another - void copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC) const; - - void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned DestReg, const MachineInstr *Orig) const; - - //! Fold spills into load/store instructions - virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, - SmallVectorImpl &Ops, - int FrameIndex) const; - - //! Fold any load/store to an operand - virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, - SmallVectorImpl &Ops, - MachineInstr* LoadMI) const; - + /// getPointerRegClass - Return the register class to use to hold pointers. + /// This is used for addressing modes. + virtual const TargetRegisterClass * + getPointerRegClass(unsigned Kind = 0) const; + + /// After allocating this many registers, the allocator should feel + /// register pressure. The value is a somewhat random guess, based on the + /// number of non callee saved registers in the C calling convention. + virtual unsigned getRegPressureLimit( const TargetRegisterClass *RC, + MachineFunction &MF) const{ + return 50; + } + //! Return the array of callee-saved registers virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const; - //! Return the register class array of the callee-saved registers - virtual const TargetRegisterClass* const * - getCalleeSavedRegClasses(const MachineFunction *MF) const; + //! Allow for scavenging, so we can get scratch registers when needed. + virtual bool requiresRegisterScavenging(const MachineFunction &MF) const + { return true; } //! Return the reserved registers BitVector getReservedRegs(const MachineFunction &MF) const; - //! Prediate: Target has dedicated frame pointer - bool hasFP(const MachineFunction &MF) const; //! Eliminate the call frame setup pseudo-instructions void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; //! Convert frame indicies into machine operands - void eliminateFrameIndex(MachineBasicBlock::iterator II, int, - RegScavenger *RS) const; - //! Determine the frame's layour - void determineFrameLayout(MachineFunction &MF) const; - - void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS = NULL) const; - //! Emit the function prologue - void emitPrologue(MachineFunction &MF) const; - //! Emit the function epilogue - void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; - //! Get return address register (LR, aka R0) - unsigned getRARegister() const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, + RegScavenger *RS = NULL) const; + //! Get the stack frame register (SP, aka R1) - unsigned getFrameRegister(MachineFunction &MF) const; - //! Perform target-specific stack frame setup. - void getInitialFrameState(std::vector &Moves) const; + unsigned getFrameRegister(const MachineFunction &MF) const; //------------------------------------------------------------------------ // New methods added: //------------------------------------------------------------------------ - //! Return the array of argument passing registers + //! Convert D-form load/store to X-form load/store /*! - \note The size of this array is returned by getArgRegsSize(). + Converts a regiser displacement load/store into a register-indexed + load/store for large stack frames, when the stack frame exceeds the + range of a s10 displacement. */ - static const unsigned *getArgRegs(); + int convertDFormToXForm(int dFormOpcode) const; - //! Return the size of the argument passing register array - static const unsigned getNumArgRegs(); - - //! Get DWARF debugging register number - int getDwarfRegNum(unsigned RegNum, bool isEH) const; + //! Acquire an unused register in an emergency. + unsigned findScratchRegister(MachineBasicBlock::iterator II, + RegScavenger *RS, + const TargetRegisterClass *RC, + int SPAdj) const; + }; } // end namespace llvm