X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FHexagon%2FHexagonBitTracker.cpp;h=15163d43fba75d24c240b6438a10f189dde7fc5c;hb=c413998d28c4e201e265b0bdbe90ddc2747856c4;hp=021e58a1d08ae7a2641552dcd5b6c228af4ffb5d;hpb=360ec4c35f279757c079ff295bcc7b8928c18503;p=oota-llvm.git diff --git a/lib/Target/Hexagon/HexagonBitTracker.cpp b/lib/Target/Hexagon/HexagonBitTracker.cpp index 021e58a1d08..15163d43fba 100644 --- a/lib/Target/Hexagon/HexagonBitTracker.cpp +++ b/lib/Target/Hexagon/HexagonBitTracker.cpp @@ -95,30 +95,29 @@ BT::BitMask HexagonEvaluator::mask(unsigned Reg, unsigned Sub) const { llvm_unreachable("Unexpected register/subregister"); } - namespace { - struct RegisterRefs : public std::vector { - typedef std::vector Base; - RegisterRefs(const MachineInstr *MI); - const BT::RegisterRef &operator[](unsigned n) const { - // The main purpose of this operator is to assert with bad argument. - assert(n < size()); - return Base::operator[](n); - } - }; +class RegisterRefs { + std::vector Vector; - RegisterRefs::RegisterRefs(const MachineInstr *MI) - : Base(MI->getNumOperands()) { - for (unsigned i = 0, n = size(); i < n; ++i) { +public: + RegisterRefs(const MachineInstr *MI) : Vector(MI->getNumOperands()) { + for (unsigned i = 0, n = Vector.size(); i < n; ++i) { const MachineOperand &MO = MI->getOperand(i); if (MO.isReg()) - at(i) = BT::RegisterRef(MO); + Vector[i] = BT::RegisterRef(MO); // For indices that don't correspond to registers, the entry will // remain constructed via the default constructor. } } -} + size_t size() const { return Vector.size(); } + const BT::RegisterRef &operator[](unsigned n) const { + // The main purpose of this operator is to assert with bad argument. + assert(n < Vector.size()); + return Vector[n]; + } +}; +} bool HexagonEvaluator::evaluate(const MachineInstr *MI, const CellMapType &Inputs, CellMapType &Outputs) const {