X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FMBlaze%2FMBlazeInstrFormats.td;h=e40432a1b9a9a85f28e62fe7f6535fee7ebb2b5e;hb=00796a1b15a83247e19c2445a6ff7a31e72299a4;hp=28e8e4402225b48c62dc6da28482afa3d5e6ca86;hpb=23e70ebf352ff4938210711464c68b5a6e46e61c;p=oota-llvm.git diff --git a/lib/Target/MBlaze/MBlazeInstrFormats.td b/lib/Target/MBlaze/MBlazeInstrFormats.td index 28e8e440222..e40432a1b9a 100644 --- a/lib/Target/MBlaze/MBlazeInstrFormats.td +++ b/lib/Target/MBlaze/MBlazeInstrFormats.td @@ -1,4 +1,4 @@ -//===- MBlazeInstrFormats.td - MB Instruction defs ---------*- tablegen -*-===// +//===-- MBlazeInstrFormats.td - MB Instruction defs --------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // @@ -7,6 +7,36 @@ // //===----------------------------------------------------------------------===// +// Format specifies the encoding used by the instruction. This is part of the +// ad-hoc solution used to emit machine instruction encodings by our machine +// code emitter. +class Format val> { + bits<6> Value = val; +} + +def FPseudo : Format<0>; +def FRRR : Format<1>; // ADD, OR, etc. +def FRRI : Format<2>; // ADDI, ORI, etc. +def FCRR : Format<3>; // PUTD, WDC, WIC, BEQ, BNE, BGE, etc. +def FCRI : Format<4>; // RTID, RTED, RTSD, BEQI, BNEI, BGEI, etc. +def FRCR : Format<5>; // BRLD, BRALD, GETD +def FRCI : Format<6>; // BRLID, BRALID, MSRCLR, MSRSET +def FCCR : Format<7>; // BR, BRA, BRD, etc. +def FCCI : Format<8>; // IMM, BRI, BRAI, BRID, etc. +def FRRCI : Format<9>; // BSRLI, BSRAI, BSLLI +def FRRC : Format<10>; // SEXT8, SEXT16, SRA, SRC, SRL, FLT, FINT, FSQRT +def FRCX : Format<11>; // GET +def FRCS : Format<12>; // MFS +def FCRCS : Format<13>; // MTS +def FCRCX : Format<14>; // PUT +def FCX : Format<15>; // TPUT +def FCR : Format<16>; // TPUTD +def FRIR : Format<17>; // RSUBI +def FRRRR : Format<18>; // RSUB, FRSUB +def FRI : Format<19>; // RSUB, FRSUB +def FC : Format<20>; // NOP +def FRR : Format<21>; // CLZ + //===----------------------------------------------------------------------===// // Describe MBlaze instructions format // @@ -21,226 +51,178 @@ //===----------------------------------------------------------------------===// // Generic MBlaze Format -class MBlazeInst pattern, - InstrItinClass itin> : Instruction -{ - field bits<32> Inst; - +class MBlazeInst op, Format form, dag outs, dag ins, string asmstr, + list pattern, InstrItinClass itin> : Instruction { let Namespace = "MBlaze"; + field bits<32> Inst; - bits<6> opcode; + bits<6> opcode = op; + Format Form = form; + bits<6> FormBits = Form.Value; // Top 6 bits are the 'opcode' field - let Inst{0-5} = opcode; - + let Inst{0-5} = opcode; + + // If the instruction is marked as a pseudo, set isCodeGenOnly so that the + // assembler and disassmbler ignore it. + let isCodeGenOnly = !eq(!cast(form), "FPseudo"); + dag OutOperandList = outs; dag InOperandList = ins; let AsmString = asmstr; let Pattern = pattern; let Itinerary = itin; + + // TSFlags layout should be kept in sync with MBlazeInstrInfo.h. + let TSFlags{5-0} = FormBits; } //===----------------------------------------------------------------------===// // Pseudo instruction class //===----------------------------------------------------------------------===// class MBlazePseudo pattern>: - MBlazeInst; + MBlazeInst<0x0, FPseudo, outs, ins, asmstr, pattern, IIC_Pseudo>; //===----------------------------------------------------------------------===// // Type A instruction class in MBlaze : <|opcode|rd|ra|rb|flags|> //===----------------------------------------------------------------------===// class TA op, bits<11> flags, dag outs, dag ins, string asmstr, - list pattern, InstrItinClass itin> : - MBlazeInst + list pattern, InstrItinClass itin> : + MBlazeInst { bits<5> rd; bits<5> ra; bits<5> rb; - let opcode = op; - let Inst{6-10} = rd; - let Inst{11-15} = ra; + let Inst{11-15} = ra; let Inst{16-20} = rb; let Inst{21-31} = flags; } -class TAI op, dag outs, dag ins, string asmstr, - list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<5> rd; - bits<5> ra; - bits<16> imm16; - - let opcode = op; - - let Inst{6-10} = rd; - let Inst{11-15} = ra; - let Inst{16-31} = imm16; -} - -class TIMM op, dag outs, dag ins, string asmstr, - list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<5> ra; - bits<16> imm16; - - let opcode = op; - - let Inst{6-15} = 0; - let Inst{16-31} = imm16; -} - -class TADDR op, dag outs, dag ins, string asmstr, - list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<26> addr; - - let opcode = op; - - let Inst{6-31} = addr; -} - //===----------------------------------------------------------------------===// // Type B instruction class in MBlaze : <|opcode|rd|ra|immediate|> //===----------------------------------------------------------------------===// class TB op, dag outs, dag ins, string asmstr, list pattern, - InstrItinClass itin> : - MBlazeInst + InstrItinClass itin> : + MBlazeInst { bits<5> rd; bits<5> ra; bits<16> imm16; - let opcode = op; - let Inst{6-10} = rd; - let Inst{11-15} = ra; + let Inst{11-15} = ra; let Inst{16-31} = imm16; } //===----------------------------------------------------------------------===// -// Float instruction class in MBlaze : <|opcode|rd|ra|flags|> +// Type A instruction class in MBlaze but with the operands reversed +// in the LLVM DAG : <|opcode|rd|ra|rb|flags|> //===----------------------------------------------------------------------===// -class TF op, bits<11> flags, dag outs, dag ins, string asmstr, - list pattern, InstrItinClass itin> : - MBlazeInst +class TAR op, bits<11> flags, dag outs, dag ins, string asmstr, + list pattern, InstrItinClass itin> : + TA { - bits<5> rd; - bits<5> ra; + bits<5> rrd; + bits<5> rrb; + bits<5> rra; - let opcode = op; + let Form = FRRRR; - let Inst{6-10} = rd; - let Inst{11-15} = ra; - let Inst{16-20} = 0; - let Inst{21-31} = flags; + let rd = rrd; + let ra = rra; + let rb = rrb; } //===----------------------------------------------------------------------===// -// Branch instruction class in MBlaze : <|opcode|rd|br|ra|flags|> +// Type B instruction class in MBlaze but with the operands reversed in +// the LLVM DAG : <|opcode|rd|ra|immediate|> //===----------------------------------------------------------------------===// - -class TBR op, bits<5> br, bits<11> flags, dag outs, dag ins, - string asmstr, list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<5> ra; - - let opcode = op; - - let Inst{6-10} = 0; - let Inst{11-15} = br; - let Inst{16-20} = ra; - let Inst{21-31} = flags; +class TBR op, dag outs, dag ins, string asmstr, list pattern, + InstrItinClass itin> : + TB { + bits<5> rrd; + bits<16> rimm16; + bits<5> rra; + + let Form = FRIR; + + let rd = rrd; + let ra = rra; + let imm16 = rimm16; } -class TBRC op, bits<5> br, bits<11> flags, dag outs, dag ins, - string asmstr, list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<5> ra; - bits<5> rb; - - let opcode = op; - - let Inst{6-10} = br; - let Inst{11-15} = ra; - let Inst{16-20} = rb; - let Inst{21-31} = flags; -} - -class TBRL op, bits<5> br, bits<11> flags, dag outs, dag ins, - string asmstr, list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<5> ra; - - let opcode = op; - - let Inst{6-10} = 0xF; - let Inst{11-15} = br; - let Inst{16-20} = ra; - let Inst{21-31} = flags; -} - -class TBRI op, bits<5> br, dag outs, dag ins, - string asmstr, list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<16> imm16; - - let opcode = op; +//===----------------------------------------------------------------------===// +// Shift immediate instruction class in MBlaze : <|opcode|rd|ra|immediate|> +//===----------------------------------------------------------------------===// +class SHT op, bits<2> flags, dag outs, dag ins, string asmstr, + list pattern, InstrItinClass itin> : + MBlazeInst { + bits<5> rd; + bits<5> ra; + bits<5> imm5; - let Inst{6-10} = 0; - let Inst{11-15} = br; - let Inst{16-31} = imm16; + let Inst{6-10} = rd; + let Inst{11-15} = ra; + let Inst{16-20} = 0x0; + let Inst{21-22} = flags; + let Inst{23-26} = 0x0; + let Inst{27-31} = imm5; } -class TBRLI op, bits<5> br, dag outs, dag ins, - string asmstr, list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<16> imm16; - - let opcode = op; +//===----------------------------------------------------------------------===// +// Special instruction class in MBlaze : <|opcode|rd|imm14|> +//===----------------------------------------------------------------------===// +class SPC op, bits<2> flags, dag outs, dag ins, string asmstr, + list pattern, InstrItinClass itin> : + MBlazeInst { + bits<5> rd; + bits<14> imm14; - let Inst{6-10} = 0xF; - let Inst{11-15} = br; - let Inst{16-31} = imm16; + let Inst{6-10} = rd; + let Inst{11-15} = 0x0; + let Inst{16-17} = flags; + let Inst{18-31} = imm14; } -class TBRCI op, bits<5> br, dag outs, dag ins, - string asmstr, list pattern, InstrItinClass itin> : - MBlazeInst -{ - bits<5> ra; - bits<16> imm16; - - let opcode = op; +//===----------------------------------------------------------------------===// +// MSR instruction class in MBlaze : <|opcode|rd|imm15|> +//===----------------------------------------------------------------------===// +class MSR op, bits<6> flags, dag outs, dag ins, string asmstr, + list pattern, InstrItinClass itin> : + MBlazeInst { + bits<5> rd; + bits<15> imm15; - let Inst{6-10} = br; - let Inst{11-15} = ra; - let Inst{16-31} = imm16; + let Inst{6-10} = rd; + let Inst{11-16} = flags; + let Inst{17-31} = imm15; } -class TRET op, dag outs, dag ins, - string asmstr, list pattern, InstrItinClass itin> : - MBlazeInst -{ +//===----------------------------------------------------------------------===// +// TCLZ instruction class in MBlaze : <|opcode|rd|imm15|> +//===----------------------------------------------------------------------===// +class TCLZ op, bits<16> flags, dag outs, dag ins, string asmstr, + list pattern, InstrItinClass itin> : + MBlazeInst { + bits<5> rd; bits<5> ra; - bits<16> imm16; - let opcode = op; + let Inst{6-10} = rd; + let Inst{11-15} = ra; + let Inst{16-31} = flags; +} - let Inst{6-10} = 0x10; - let Inst{11-15} = ra; - let Inst{16-31} = imm16; +//===----------------------------------------------------------------------===// +// MBAR instruction class in MBlaze : <|opcode|rd|imm15|> +//===----------------------------------------------------------------------===// +class MBAR op, bits<26> flags, dag outs, dag ins, string asmstr, + list pattern, InstrItinClass itin> : + MBlazeInst { + let Inst{6-31} = flags; }