X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FMSP430%2FMSP430ISelLowering.h;h=80d3ae175fb11d1876ee9179d829f7cac38b0915;hb=21a996a0e3ea75f93923cf329d551e058487be2b;hp=87a790b047b72ef9c5b1b4c7f0ae06bcaf463536;hpb=0c439eb2c8397996cbccaf2798e598052d9982c8;p=oota-llvm.git diff --git a/lib/Target/MSP430/MSP430ISelLowering.h b/lib/Target/MSP430/MSP430ISelLowering.h index 87a790b047b..80d3ae175fb 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.h +++ b/lib/Target/MSP430/MSP430ISelLowering.h @@ -1,4 +1,4 @@ -//==-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ------*- C++ -*-==// +//===-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ----*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_TARGET_MSP430_ISELLOWERING_H -#define LLVM_TARGET_MSP430_ISELLOWERING_H +#ifndef LLVM_LIB_TARGET_MSP430_MSP430ISELLOWERING_H +#define LLVM_LIB_TARGET_MSP430_MSP430ISELLOWERING_H #include "MSP430.h" #include "llvm/CodeGen/SelectionDAG.h" @@ -21,7 +21,7 @@ namespace llvm { namespace MSP430ISD { - enum { + enum NodeType : unsigned { FIRST_NUMBER = ISD::BUILTIN_OP_END, /// Return with a flag operand. Operand 0 is the chain operand. @@ -67,43 +67,46 @@ namespace llvm { } class MSP430Subtarget; - class MSP430TargetMachine; - class MSP430TargetLowering : public TargetLowering { public: - explicit MSP430TargetLowering(MSP430TargetMachine &TM); + explicit MSP430TargetLowering(const TargetMachine &TM, + const MSP430Subtarget &STI); + + MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i8; } /// LowerOperation - Provide custom lowering hooks for some operations. - virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); + SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; /// getTargetNodeName - This method returns the name of a target specific /// DAG node. - virtual const char *getTargetNodeName(unsigned Opcode) const; - - /// getFunctionAlignment - Return the Log2 alignment of this function. - virtual unsigned getFunctionAlignment(const Function *F) const; - - SDValue LowerShifts(SDValue Op, SelectionDAG &DAG); - SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); - SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG); - SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG); - SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG); - SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG); - SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG); - SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG); - SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG); - SDValue getReturnAddressFrameIndex(SelectionDAG &DAG); + const char *getTargetNodeName(unsigned Opcode) const override; + + SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; + SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const; TargetLowering::ConstraintType - getConstraintType(const std::string &Constraint) const; - std::pair - getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; + getConstraintType(const std::string &Constraint) const override; + std::pair + getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, + const std::string &Constraint, + MVT VT) const override; /// isTruncateFree - Return true if it's free to truncate a value of type /// Ty1 to type Ty2. e.g. On msp430 it's free to truncate a i16 value in /// register R15W to i8 by referencing its sub-register R15B. - virtual bool isTruncateFree(const Type *Ty1, const Type *Ty2) const; - virtual bool isTruncateFree(EVT VT1, EVT VT2) const; + bool isTruncateFree(Type *Ty1, Type *Ty2) const override; + bool isTruncateFree(EVT VT1, EVT VT2) const override; /// isZExtFree - Return true if any actual instruction that defines a value /// of type Ty1 implicit zero-extends the value to Ty2 in the result @@ -113,69 +116,61 @@ namespace llvm { /// necessarily apply to truncate instructions. e.g. on msp430, all /// instructions that define 8-bit values implicit zero-extend the result /// out to 16 bits. - virtual bool isZExtFree(const Type *Ty1, const Type *Ty2) const; - virtual bool isZExtFree(EVT VT1, EVT VT2) const; + bool isZExtFree(Type *Ty1, Type *Ty2) const override; + bool isZExtFree(EVT VT1, EVT VT2) const override; + bool isZExtFree(SDValue Val, EVT VT2) const override; MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI, - MachineBasicBlock *BB, - DenseMap *EM) const; + MachineBasicBlock *BB) const override; MachineBasicBlock* EmitShiftInstr(MachineInstr *MI, - MachineBasicBlock *BB, - DenseMap *EM) const; + MachineBasicBlock *BB) const; private: SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl &Outs, + const SmallVectorImpl &OutVals, const SmallVectorImpl &Ins, - DebugLoc dl, SelectionDAG &DAG, - SmallVectorImpl &InVals); + SDLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) const; SDValue LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, - DebugLoc dl, + SDLoc dl, SelectionDAG &DAG, - SmallVectorImpl &InVals); + SmallVectorImpl &InVals) const; SDValue LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, - DebugLoc dl, SelectionDAG &DAG, - SmallVectorImpl &InVals); + SDLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) const; - virtual SDValue + SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, - DebugLoc dl, SelectionDAG &DAG, - SmallVectorImpl &InVals); - virtual SDValue - LowerCall(SDValue Chain, SDValue Callee, - CallingConv::ID CallConv, bool isVarArg, bool &isTailCall, - const SmallVectorImpl &Outs, - const SmallVectorImpl &Ins, - DebugLoc dl, SelectionDAG &DAG, - SmallVectorImpl &InVals); - - virtual SDValue - LowerReturn(SDValue Chain, - CallingConv::ID CallConv, bool isVarArg, - const SmallVectorImpl &Outs, - DebugLoc dl, SelectionDAG &DAG); - - virtual bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, - SDValue &Base, - SDValue &Offset, - ISD::MemIndexedMode &AM, - SelectionDAG &DAG) const; - - const MSP430Subtarget &Subtarget; - const MSP430TargetMachine &TM; - const TargetData *TD; + SDLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) const override; + SDValue + LowerCall(TargetLowering::CallLoweringInfo &CLI, + SmallVectorImpl &InVals) const override; + + SDValue LowerReturn(SDValue Chain, + CallingConv::ID CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + const SmallVectorImpl &OutVals, + SDLoc dl, SelectionDAG &DAG) const override; + + bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, + SDValue &Base, + SDValue &Offset, + ISD::MemIndexedMode &AM, + SelectionDAG &DAG) const override; }; } // namespace llvm -#endif // LLVM_TARGET_MSP430_ISELLOWERING_H +#endif