X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FMSP430%2FMSP430RegisterInfo.cpp;h=aed46a2ec595e53b49c964de7a7b6c6845362865;hb=fef904d0e824a2c587f8c1063b6c4fbf47fec898;hp=d1401f5d720cdf64e663b48e914502e6965385c7;hpb=2cfd52c507bd5790457a171eb9bcb39019cc6860;p=oota-llvm.git diff --git a/lib/Target/MSP430/MSP430RegisterInfo.cpp b/lib/Target/MSP430/MSP430RegisterInfo.cpp index d1401f5d720..aed46a2ec59 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.cpp +++ b/lib/Target/MSP430/MSP430RegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- MSP430RegisterInfo.cpp - MSP430 Register Information ---------------===// +//===-- MSP430RegisterInfo.cpp - MSP430 Register Information --------------===// // // The LLVM Compiler Infrastructure // @@ -13,10 +13,11 @@ #define DEBUG_TYPE "msp430-reg-info" +#include "MSP430RegisterInfo.h" #include "MSP430.h" #include "MSP430MachineFunctionInfo.h" -#include "MSP430RegisterInfo.h" #include "MSP430TargetMachine.h" +#include "llvm/Function.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" @@ -25,74 +26,87 @@ #include "llvm/ADT/BitVector.h" #include "llvm/Support/ErrorHandling.h" +#define GET_REGINFO_TARGET_DESC +#include "MSP430GenRegisterInfo.inc" + using namespace llvm; // FIXME: Provide proper call frame setup / destroy opcodes. MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm, const TargetInstrInfo &tii) - : MSP430GenRegisterInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP), - TM(tm), TII(tii) { - StackAlign = TM.getFrameInfo()->getStackAlignment(); + : MSP430GenRegisterInfo(MSP430::PCW), TM(tm), TII(tii) { + StackAlign = TM.getFrameLowering()->getStackAlignment(); } -const unsigned* +const uint16_t* MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { - static const unsigned CalleeSavedRegs[] = { + const TargetFrameLowering *TFI = MF->getTarget().getFrameLowering(); + const Function* F = MF->getFunction(); + static const uint16_t CalleeSavedRegs[] = { MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W, MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W, 0 }; - - return CalleeSavedRegs; -} - -const TargetRegisterClass *const * -MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const { - static const TargetRegisterClass * const CalleeSavedRegClasses[] = { - &MSP430::GR16RegClass, &MSP430::GR16RegClass, - &MSP430::GR16RegClass, &MSP430::GR16RegClass, - &MSP430::GR16RegClass, &MSP430::GR16RegClass, - &MSP430::GR16RegClass, &MSP430::GR16RegClass, + static const uint16_t CalleeSavedRegsFP[] = { + MSP430::R5W, MSP430::R6W, MSP430::R7W, + MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W, 0 }; + static const uint16_t CalleeSavedRegsIntr[] = { + MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W, + MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W, + MSP430::R12W, MSP430::R13W, MSP430::R14W, MSP430::R15W, + 0 + }; + static const uint16_t CalleeSavedRegsIntrFP[] = { + MSP430::R5W, MSP430::R6W, MSP430::R7W, + MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W, + MSP430::R12W, MSP430::R13W, MSP430::R14W, MSP430::R15W, + 0 + }; + + if (TFI->hasFP(*MF)) + return (F->getCallingConv() == CallingConv::MSP430_INTR ? + CalleeSavedRegsIntrFP : CalleeSavedRegsFP); + else + return (F->getCallingConv() == CallingConv::MSP430_INTR ? + CalleeSavedRegsIntr : CalleeSavedRegs); - return CalleeSavedRegClasses; } BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); + const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); - // Mark 4 special registers as reserved. + // Mark 4 special registers with subregisters as reserved. + Reserved.set(MSP430::PCB); + Reserved.set(MSP430::SPB); + Reserved.set(MSP430::SRB); + Reserved.set(MSP430::CGB); Reserved.set(MSP430::PCW); Reserved.set(MSP430::SPW); Reserved.set(MSP430::SRW); Reserved.set(MSP430::CGW); // Mark frame pointer as reserved if needed. - if (hasFP(MF)) + if (TFI->hasFP(MF)) Reserved.set(MSP430::FPW); return Reserved; } const TargetRegisterClass * -MSP430RegisterInfo::getPointerRegClass(unsigned Kind) const { +MSP430RegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) + const { return &MSP430::GR16RegClass; } - -bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const { - return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects(); -} - -bool MSP430RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const { - return !MF.getFrameInfo()->hasVarSizedObjects(); -} - void MSP430RegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - if (!hasReservedCallFrame(MF)) { + const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); + + if (!TFI->hasReservedCallFrame(MF)) { // If the stack pointer can be changed after prologue, turn the // adjcallstackup instruction into a 'sub SPW, ' and the // adjcallstackdown instruction into 'add SPW, ' @@ -106,12 +120,12 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, Amount = (Amount+StackAlign-1)/StackAlign*StackAlign; MachineInstr *New = 0; - if (Old->getOpcode() == getCallFrameSetupOpcode()) { + if (Old->getOpcode() == TII.getCallFrameSetupOpcode()) { New = BuildMI(MF, Old->getDebugLoc(), TII.get(MSP430::SUB16ri), MSP430::SPW) .addReg(MSP430::SPW).addImm(Amount); } else { - assert(Old->getOpcode() == getCallFrameDestroyOpcode()); + assert(Old->getOpcode() == TII.getCallFrameDestroyOpcode()); // factor out the amount the callee already popped. uint64_t CalleeAmt = Old->getOperand(1).getImm(); Amount -= CalleeAmt; @@ -129,7 +143,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MBB.insert(I, New); } } - } else if (I->getOpcode() == getCallFrameDestroyOpcode()) { + } else if (I->getOpcode() == TII.getCallFrameDestroyOpcode()) { // If we are performing frame pointer elimination and if the callee pops // something off the stack pointer, add it back. if (uint64_t CalleeAmt = I->getOperand(1).getImm()) { @@ -156,6 +170,7 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); + const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); DebugLoc dl = MI.getDebugLoc(); while (!MI.getOperand(i).isFI()) { ++i; @@ -164,13 +179,13 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int FrameIndex = MI.getOperand(i).getIndex(); - unsigned BasePtr = (hasFP(MF) ? MSP430::FPW : MSP430::SPW); + unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW); int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); // Skip the saved PC Offset += 2; - if (!hasFP(MF)) + if (!TFI->hasFP(MF)) Offset += MF.getFrameInfo()->getStackSize(); else Offset += 2; // Skip the saved FPW @@ -192,10 +207,10 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, // We need to materialize the offset via add instruction. unsigned DstReg = MI.getOperand(0).getReg(); if (Offset < 0) - BuildMI(MBB, next(II), dl, TII.get(MSP430::SUB16ri), DstReg) + BuildMI(MBB, llvm::next(II), dl, TII.get(MSP430::SUB16ri), DstReg) .addReg(DstReg).addImm(-Offset); else - BuildMI(MBB, next(II), dl, TII.get(MSP430::ADD16ri), DstReg) + BuildMI(MBB, llvm::next(II), dl, TII.get(MSP430::ADD16ri), DstReg) .addReg(DstReg).addImm(Offset); return; @@ -208,150 +223,19 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, void MSP430RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF) const { + const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); + // Create a frame entry for the FPW register that must be saved. - if (hasFP(MF)) { - int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4); + if (TFI->hasFP(MF)) { + int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4, true); + (void)FrameIdx; assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() && "Slot for FPW register must be last in order to be found!"); - FrameIdx = 0; } } +unsigned MSP430RegisterInfo::getFrameRegister(const MachineFunction &MF) const { + const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); -void MSP430RegisterInfo::emitPrologue(MachineFunction &MF) const { - MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB - MachineFrameInfo *MFI = MF.getFrameInfo(); - MSP430MachineFunctionInfo *MSP430FI = MF.getInfo(); - MachineBasicBlock::iterator MBBI = MBB.begin(); - DebugLoc DL = (MBBI != MBB.end() ? MBBI->getDebugLoc() : - DebugLoc::getUnknownLoc()); - - // Get the number of bytes to allocate from the FrameInfo. - uint64_t StackSize = MFI->getStackSize(); - - uint64_t NumBytes = 0; - if (hasFP(MF)) { - // Calculate required stack adjustment - uint64_t FrameSize = StackSize - 2; - NumBytes = FrameSize - MSP430FI->getCalleeSavedFrameSize(); - - // Get the offset of the stack slot for the EBP register... which is - // guaranteed to be the last slot by processFunctionBeforeFrameFinalized. - // Update the frame offset adjustment. - MFI->setOffsetAdjustment(-NumBytes); - - // Save FPW into the appropriate stack slot... - BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) - .addReg(MSP430::FPW, RegState::Kill); - - // Update FPW with the new base value... - BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW) - .addReg(MSP430::SPW); - - // Mark the FramePtr as live-in in every block except the entry. - for (MachineFunction::iterator I = next(MF.begin()), E = MF.end(); - I != E; ++I) - I->addLiveIn(MSP430::FPW); - - } else - NumBytes = StackSize - MSP430FI->getCalleeSavedFrameSize(); - - // Skip the callee-saved push instructions. - while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r)) - ++MBBI; - - if (MBBI != MBB.end()) - DL = MBBI->getDebugLoc(); - - if (NumBytes) { // adjust stack pointer: SPW -= numbytes - // If there is an SUB16ri of SPW immediately before this instruction, merge - // the two. - //NumBytes -= mergeSPUpdates(MBB, MBBI, true); - // If there is an ADD16ri or SUB16ri of SPW immediately after this - // instruction, merge the two instructions. - // mergeSPUpdatesDown(MBB, MBBI, &NumBytes); - - if (NumBytes) { - MachineInstr *MI = - BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW) - .addReg(MSP430::SPW).addImm(NumBytes); - // The SRW implicit def is dead. - MI->getOperand(3).setIsDead(); - } - } + return TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW; } - -void MSP430RegisterInfo::emitEpilogue(MachineFunction &MF, - MachineBasicBlock &MBB) const { - const MachineFrameInfo *MFI = MF.getFrameInfo(); - MSP430MachineFunctionInfo *MSP430FI = MF.getInfo(); - MachineBasicBlock::iterator MBBI = prior(MBB.end()); - unsigned RetOpcode = MBBI->getOpcode(); - DebugLoc DL = MBBI->getDebugLoc(); - - switch (RetOpcode) { - case MSP430::RET: break; // These are ok - default: - llvm_unreachable("Can only insert epilog into returning blocks"); - } - - // Get the number of bytes to allocate from the FrameInfo - uint64_t StackSize = MFI->getStackSize(); - unsigned CSSize = MSP430FI->getCalleeSavedFrameSize(); - uint64_t NumBytes = 0; - - if (hasFP(MF)) { - // Calculate required stack adjustment - uint64_t FrameSize = StackSize - 2; - NumBytes = FrameSize - CSSize; - - // pop FPW. - BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FPW); - } else - NumBytes = StackSize - CSSize; - - // Skip the callee-saved pop instructions. - MachineBasicBlock::iterator LastCSPop = MBBI; - while (MBBI != MBB.begin()) { - MachineBasicBlock::iterator PI = prior(MBBI); - unsigned Opc = PI->getOpcode(); - if (Opc != MSP430::POP16r && !PI->getDesc().isTerminator()) - break; - --MBBI; - } - - DL = MBBI->getDebugLoc(); - - // If there is an ADD16ri or SUB16ri of SPW immediately before this - // instruction, merge the two instructions. - //if (NumBytes || MFI->hasVarSizedObjects()) - // mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes); - - if (MFI->hasVarSizedObjects()) { - llvm_unreachable("Not implemented yet!"); - } else { - // adjust stack pointer back: SPW += numbytes - if (NumBytes) { - MachineInstr *MI = - BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SPW) - .addReg(MSP430::SPW).addImm(NumBytes); - // The SRW implicit def is dead. - MI->getOperand(3).setIsDead(); - } - } -} - -unsigned MSP430RegisterInfo::getRARegister() const { - return MSP430::PCW; -} - -unsigned MSP430RegisterInfo::getFrameRegister(MachineFunction &MF) const { - return hasFP(MF) ? MSP430::FPW : MSP430::SPW; -} - -int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { - llvm_unreachable("Not implemented yet!"); - return 0; -} - -#include "MSP430GenRegisterInfo.inc"