X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FMips%2FMipsRegisterInfo.h;h=0716d29b2f385883d7bcec22e45a54569a8bf3db;hb=c12a6e6b53bb6df62a0020bda91206fd149c430a;hp=2181cdf3821944c9fa46940bfadf8d9fa1e08a9c;hpb=43dbe05279b753aabda571d9c83eaeb36987001a;p=oota-llvm.git

diff --git a/lib/Target/Mips/MipsRegisterInfo.h b/lib/Target/Mips/MipsRegisterInfo.h
index 2181cdf3821..0716d29b2f3 100644
--- a/lib/Target/Mips/MipsRegisterInfo.h
+++ b/lib/Target/Mips/MipsRegisterInfo.h
@@ -1,4 +1,4 @@
-//===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
+//===-- MipsRegisterInfo.h - Mips Register Information Impl -----*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -7,42 +7,47 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file contains the Mips implementation of the MRegisterInfo class.
+// This file contains the Mips implementation of the TargetRegisterInfo class.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef MIPSREGISTERINFO_H
 #define MIPSREGISTERINFO_H
 
-#include "llvm/Target/MRegisterInfo.h"
-#include "MipsGenRegisterInfo.h.inc"
+#include "Mips.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 
-namespace llvm {
+#define GET_REGINFO_HEADER
+#include "MipsGenRegisterInfo.inc"
 
+namespace llvm {
+class MipsSubtarget;
 class TargetInstrInfo;
 class Type;
 
 struct MipsRegisterInfo : public MipsGenRegisterInfo {
+  const MipsSubtarget &Subtarget;
   const TargetInstrInfo &TII;
-  
-  MipsRegisterInfo(const TargetInstrInfo &tii);
+
+  MipsRegisterInfo(const MipsSubtarget &Subtarget, const TargetInstrInfo &tii);
 
   /// getRegisterNumbering - Given the enum value for some register, e.g.
   /// Mips::RA, return the number that it corresponds to (e.g. 31).
   static unsigned getRegisterNumbering(unsigned RegEnum);
 
-  /// Code Generation virtual methods...
-  void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
-                     unsigned DestReg, const MachineInstr *Orig) const;
+  /// Get PIC indirect call register
+  static unsigned getPICCallReg();
 
-  const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
+  /// Adjust the Mips stack frame.
+  void adjustMipsStackFrame(MachineFunction &MF) const;
 
-  const TargetRegisterClass* const*
-  getCalleeSavedRegClasses(const MachineFunction* MF = 0) const;
+  /// Code Generation virtual methods...
+  const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
+  const uint32_t *getCallPreservedMask(CallingConv::ID) const;
 
   BitVector getReservedRegs(const MachineFunction &MF) const;
 
-  bool hasFP(const MachineFunction &MF) const;
+  virtual bool requiresRegisterScavenging(const MachineFunction &MF) const;
 
   void eliminateCallFramePseudoInstr(MachineFunction &MF,
                                      MachineBasicBlock &MBB,
@@ -54,18 +59,12 @@ struct MipsRegisterInfo : public MipsGenRegisterInfo {
 
   void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
 
-  void emitPrologue(MachineFunction &MF) const;
-  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
-  
   /// Debug information queries.
-  unsigned getRARegister() const;
-  unsigned getFrameRegister(MachineFunction &MF) const;
+  unsigned getFrameRegister(const MachineFunction &MF) const;
 
   /// Exception handling queries.
   unsigned getEHExceptionRegister() const;
   unsigned getEHHandlerRegister() const;
-
-  int getDwarfRegNum(unsigned RegNum, bool isEH) const;
 };
 
 } // end namespace llvm