X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FMips%2FMipsRegisterInfo.h;h=20ba41d7fd79657c44b7e52686e9e5df25637fb9;hb=9a308df027b60057d0fe3ba7a3ee9648f6677879;hp=75ae4233919e0b9c08789ba352c5df6d1efa25a0;hpb=58184e6878fdab651bc7c9a59dab2687ca82ede2;p=oota-llvm.git diff --git a/lib/Target/Mips/MipsRegisterInfo.h b/lib/Target/Mips/MipsRegisterInfo.h index 75ae4233919..20ba41d7fd7 100644 --- a/lib/Target/Mips/MipsRegisterInfo.h +++ b/lib/Target/Mips/MipsRegisterInfo.h @@ -1,103 +1,81 @@ -//===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===// +//===-- MipsRegisterInfo.h - Mips Register Information Impl -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // -// This file was developed by Bruno Cardoso Lopes and is distributed under the -// University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // -// This file contains the Mips implementation of the MRegisterInfo class. +// This file contains the Mips implementation of the TargetRegisterInfo class. // //===----------------------------------------------------------------------===// #ifndef MIPSREGISTERINFO_H #define MIPSREGISTERINFO_H -#include "llvm/Target/MRegisterInfo.h" -#include "MipsGenRegisterInfo.h.inc" +#include "Mips.h" +#include "llvm/Target/TargetRegisterInfo.h" -namespace llvm { +#define GET_REGINFO_HEADER +#include "MipsGenRegisterInfo.inc" -class TargetInstrInfo; +namespace llvm { +class MipsSubtarget; class Type; -struct MipsRegisterInfo : public MipsGenRegisterInfo { - const TargetInstrInfo &TII; - - MipsRegisterInfo(const TargetInstrInfo &tii); +class MipsRegisterInfo : public MipsGenRegisterInfo { +protected: + const MipsSubtarget &Subtarget; + +public: + MipsRegisterInfo(const MipsSubtarget &Subtarget); /// getRegisterNumbering - Given the enum value for some register, e.g. /// Mips::RA, return the number that it corresponds to (e.g. 31). static unsigned getRegisterNumbering(unsigned RegEnum); - /// Code Generation virtual methods... - void storeRegToStackSlot(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, - unsigned SrcReg, int FrameIndex, - const TargetRegisterClass *RC) const; - - void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, - SmallVectorImpl Addr, - const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs) const; - - void loadRegFromStackSlot(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIndex, - const TargetRegisterClass *RC) const; - - void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, - SmallVectorImpl Addr, - const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs) const; + /// Get PIC indirect call register + static unsigned getPICCallReg(); - void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned DestReg, const MachineInstr *Orig) const; + /// Adjust the Mips stack frame. + void adjustMipsStackFrame(MachineFunction &MF) const; - MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, - int FrameIndex) const; - - MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, - MachineInstr* LoadMI) const { - return 0; - } - - void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC) const; - - - const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; - - const TargetRegisterClass* const* - getCalleeSavedRegClasses(const MachineFunction* MF = 0) const; + /// Code Generation virtual methods... + unsigned getRegPressureLimit(const TargetRegisterClass *RC, + MachineFunction &MF) const; + const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const uint32_t *getCallPreservedMask(CallingConv::ID) const; + static const uint32_t *getMips16RetHelperMask(); BitVector getReservedRegs(const MachineFunction &MF) const; - bool hasFP(const MachineFunction &MF) const; + virtual bool requiresRegisterScavenging(const MachineFunction &MF) const; - void eliminateCallFramePseudoInstr(MachineFunction &MF, - MachineBasicBlock &MBB, - MachineBasicBlock::iterator I) const; + virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const; /// Stack Frame Processing Methods void eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, RegScavenger *RS = NULL) const; + int SPAdj, unsigned FIOperandNum, + RegScavenger *RS = NULL) const; - void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; + void processFunctionBeforeFrameFinalized(MachineFunction &MF, + RegScavenger *RS = NULL) const; - void emitPrologue(MachineFunction &MF) const; - void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; - /// Debug information queries. - unsigned getRARegister() const; - unsigned getFrameRegister(MachineFunction &MF) const; + unsigned getFrameRegister(const MachineFunction &MF) const; /// Exception handling queries. unsigned getEHExceptionRegister() const; unsigned getEHHandlerRegister() const; + + /// \brief Return GPR register class. + virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0; + +private: + virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo, + int FrameIndex, uint64_t StackSize, + int64_t SPOffset) const = 0; }; } // end namespace llvm