X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FPIC16%2FPIC16InstrInfo.h;h=60b02ab6b47e16bb3a39898e5e17b61a1bb18dfe;hb=573eb5e5732534a2ab307b228e1a2fa167157c5b;hp=bd3e48858fe1fdb44eb4bdb1005feee738f56349;hpb=b1b5ffd827c77f0668d803b8c06b2f9296744f99;p=oota-llvm.git

diff --git a/lib/Target/PIC16/PIC16InstrInfo.h b/lib/Target/PIC16/PIC16InstrInfo.h
index bd3e48858fe..60b02ab6b47 100644
--- a/lib/Target/PIC16/PIC16InstrInfo.h
+++ b/lib/Target/PIC16/PIC16InstrInfo.h
@@ -35,14 +35,16 @@ public:
   /// the destination along with the FrameIndex of the loaded stack slot.  If
   /// not, return 0.  This predicate must return 0 if the instruction has
   /// any side effects other than loading from the stack slot.
-  virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
+  virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, 
+                                       int &FrameIndex) const;
                                                                                
   /// isStoreToStackSlot - If the specified machine instruction is a direct
   /// store to a stack slot, return the virtual or physical register number of
   /// the source reg along with the FrameIndex of the loaded stack slot.  If
   /// not, return 0.  This predicate must return 0 if the instruction has
   /// any side effects other than storing to the stack slot.
-  virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
+  virtual unsigned isStoreToStackSlot(const MachineInstr *MI, 
+                                      int &FrameIndex) const;
 
   virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
                                    MachineBasicBlock::iterator MBBI,
@@ -59,8 +61,25 @@ public:
                             const TargetRegisterClass *DestRC,
                             const TargetRegisterClass *SrcRC) const;
   virtual bool isMoveInstr(const MachineInstr &MI,
-                           unsigned &SrcReg,
-                           unsigned &DestReg) const;
+                           unsigned &SrcReg, unsigned &DstReg,
+                           unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
+
+  static inline bool hasNoMemOperand (const MachineInstr &MI) {
+
+    if (MI.getNumOperands() == 0) return true;
+
+    switch (MI.getOpcode()) {
+    default: return false;  // Beware
+    case PIC16::movlw_lo_1:
+    case PIC16::movlw_hi_1:
+    case PIC16::movlw_lo_2:
+    case PIC16::movlw_hi_2:
+      return true;
+    }
+  }
+       
+   
+    
 
 };