X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FPowerPC%2FMakefile;h=1265f1d36910bc563d996d122cf48a8b45f45c58;hb=600f171486708734e2b9c9c617528cfc51c16850;hp=e76bc3b28628d50e5900f1da4ba61ed4c17231a5;hpb=bab2adf49691014fedcffe0744e22e0277ddf1b8;p=oota-llvm.git

diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile
index e76bc3b2862..1265f1d3691 100644
--- a/lib/Target/PowerPC/Makefile
+++ b/lib/Target/PowerPC/Makefile
@@ -1,52 +1,23 @@
 ##===- lib/Target/PowerPC/Makefile -------------------------*- Makefile -*-===##
-# 
+#
 #                     The LLVM Compiler Infrastructure
 #
-# This file was developed by the LLVM research group and is distributed under
-# the University of Illinois Open Source License. See LICENSE.TXT for details.
-# 
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
 ##===----------------------------------------------------------------------===##
-LEVEL = ../../..
-LIBRARYNAME = powerpc
-include $(LEVEL)/Makefile.common
 
-TARGET = PowerPC
+LEVEL = ../../..
+LIBRARYNAME = LLVMPowerPCCodeGen
+TARGET = PPC
 
 # Make sure that tblgen is run, first thing.
-$(SourceDepend): PowerPCGenInstrNames.inc PowerPCGenRegisterNames.inc \
-                 PowerPCGenAsmWriter.inc  PPC32GenCodeEmitter.inc \
- PPC32GenRegisterInfo.h.inc PPC32GenRegisterInfo.inc PPC32GenInstrInfo.inc \
- PPC64GenRegisterInfo.h.inc PPC64GenRegisterInfo.inc PPC64GenInstrInfo.inc
-
-TDFILES = $(wildcard $(SourceDir)/*.td) $(SourceDir)/../Target.td
-
-%GenRegisterNames.inc:: PPC32.td $(TDFILES) $(TBLGEN)
-	@echo "Building $(TARGET) register names with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
+BUILT_SOURCES = PPCGenInstrNames.inc PPCGenRegisterNames.inc \
+                PPCGenAsmWriter.inc  PPCGenCodeEmitter.inc \
+                PPCGenRegisterInfo.h.inc PPCGenRegisterInfo.inc \
+                PPCGenInstrInfo.inc PPCGenDAGISel.inc \
+                PPCGenSubtarget.inc PPCGenCallingConv.inc
 
-%GenRegisterInfo.h.inc:: %.td $(TDFILES) $(TBLGEN)
-	@echo "Building `basename $<` register information header with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
+DIRS = AsmPrinter TargetInfo
 
-%GenRegisterInfo.inc:: %.td $(TDFILES) $(TBLGEN)
-	@echo "Building `basename $<` register information implementation with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
-
-$(TARGET)GenInstrNames.inc:: PPC32.td $(TDFILES) $(TBLGEN)
-	@echo "Building $(TARGET) instruction names with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
-
-%GenInstrInfo.inc:: %.td $(TDFILES) $(TBLGEN)
-	@echo "Building `basename $<` instruction information with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
-
-%GenCodeEmitter.inc:: %.td $(TDFILES) $(TBLGEN)
-	@echo "Building `basename $<` code emitter with tblgen"
-	$(VERB) $(TBLGEN) -I $(SourceDir) $< -gen-emitter -o $@
-
-$(TARGET)GenAsmWriter.inc:: $(TARGET).td $(TDFILES) $(TBLGEN)
-	@echo "Building $(TARGET).td assembly writer with tblgen"
-	$(VERB) $(TBLGEN) -I $(SourceDir) $< -gen-asm-writer -o $@
-
-clean::
-	$(VERB) rm -f *.inc
+include $(LEVEL)/Makefile.common