X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FPowerPC%2FPPCRegisterInfo.h;h=d05bc70c11d04e0159aedf36bea319973281ec33;hb=97d23335ad9a3a1e5b78b9feea49c57252ab53e9;hp=e3750481d7779dbf98cde9050e08887a99904aed;hpb=f2ccb77ee9d8ab35866dae111fa36929689c7511;p=oota-llvm.git

diff --git a/lib/Target/PowerPC/PPCRegisterInfo.h b/lib/Target/PowerPC/PPCRegisterInfo.h
index e3750481d77..d05bc70c11d 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.h
+++ b/lib/Target/PowerPC/PPCRegisterInfo.h
@@ -1,10 +1,10 @@
-//===- PPC32RegisterInfo.h - PowerPC32 Register Information Impl -*- C++ -*-==//
-// 
+//===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file was developed by the LLVM research group and is distributed under
 // the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
 //
 // This file contains the PowerPC implementation of the MRegisterInfo class.
@@ -14,33 +14,39 @@
 #ifndef POWERPC32_REGISTERINFO_H
 #define POWERPC32_REGISTERINFO_H
 
-#include "PowerPC.h"
-#include "PPC32GenRegisterInfo.h.inc"
+#include "PPC.h"
+#include "PPCGenRegisterInfo.h.inc"
 #include <map>
 
 namespace llvm {
 
 class Type;
 
-class PPC32RegisterInfo : public PPC32GenRegisterInfo {
+class PPCRegisterInfo : public PPCGenRegisterInfo {
   std::map<unsigned, unsigned> ImmToIdxMap;
 public:
-  PPC32RegisterInfo();
-  const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
+  PPCRegisterInfo();
 
   /// Code Generation virtual methods...
   void storeRegToStackSlot(MachineBasicBlock &MBB,
                            MachineBasicBlock::iterator MBBI,
-                           unsigned SrcReg, int FrameIndex) const;
+                           unsigned SrcReg, int FrameIndex,
+                           const TargetRegisterClass *RC) const;
 
   void loadRegFromStackSlot(MachineBasicBlock &MBB,
                             MachineBasicBlock::iterator MBBI,
-                            unsigned DestReg, int FrameIndex) const;
-  
+                            unsigned DestReg, int FrameIndex,
+                            const TargetRegisterClass *RC) const;
+
   void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
                     unsigned DestReg, unsigned SrcReg,
                     const TargetRegisterClass *RC) const;
 
+  /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
+  /// copy instructions, turning them into load/store instructions.
+  virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
+                                          int FrameIndex) const;
+  
   void eliminateCallFramePseudoInstr(MachineFunction &MF,
                                      MachineBasicBlock &MBB,
                                      MachineBasicBlock::iterator I) const;
@@ -49,6 +55,9 @@ public:
 
   void emitPrologue(MachineFunction &MF) const;
   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
+
+  // Debug information queries.
+  unsigned getFrameRegister(MachineFunction &MF) const;
 };
 
 } // end namespace llvm