X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FPowerPC%2FPPCSubtarget.cpp;h=40914ba62a70ea054133db7a53bca663b245c7a1;hb=f0356fe140af1a30587b9a86bcfb1b2c51b8ce20;hp=b0861d734566af03ca74568075a5d56e985288c8;hpb=2668959b8879097db368aec7d76c455260abc75b;p=oota-llvm.git diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp index b0861d73456..40914ba62a7 100644 --- a/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/lib/Target/PowerPC/PPCSubtarget.cpp @@ -1,9 +1,9 @@ -//===- PowerPCSubtarget.cpp - PPC Subtarget Information ---------*- C++ -*-===// +//===- PowerPCSubtarget.cpp - PPC Subtarget Information -------------------===// // // The LLVM Compiler Infrastructure // -// This file was developed by Nate Begeman and is distributed under the -// University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -13,74 +13,11 @@ #include "PPCSubtarget.h" #include "PPC.h" -#include "llvm/Module.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Target/SubtargetFeature.h" - +#include "llvm/GlobalValue.h" +#include "llvm/Target/TargetMachine.h" +#include "PPCGenSubtarget.inc" +#include using namespace llvm; -PPCTargetEnum llvm::PPCTarget = TargetDefault; - -namespace llvm { - cl::opt - PPCTargetArg(cl::desc("Force generation of code for a specific PPC target:"), - cl::values( - clEnumValN(TargetAIX, "aix", " Enable AIX codegen"), - clEnumValN(TargetDarwin,"darwin", - " Enable Darwin codegen"), - clEnumValEnd), - cl::location(PPCTarget), cl::init(TargetDefault)); -} - -enum PowerPCFeature { - PowerPCFeature64Bit = 1 << 0, - PowerPCFeatureAltivec = 1 << 1, - PowerPCFeatureFSqrt = 1 << 2, - PowerPCFeatureGPUL = 1 << 3, -}; - -/// Sorted (by key) array of values for CPU subtype. -static const SubtargetFeatureKV PowerPCSubTypeKV[] = { - { "601" , "Select the PowerPC 601 processor", 0 }, - { "602" , "Select the PowerPC 602 processor", 0 }, - { "603" , "Select the PowerPC 603 processor", 0 }, - { "603e" , "Select the PowerPC 603e processor", 0 }, - { "603ev" , "Select the PowerPC 603ev processor", 0 }, - { "604" , "Select the PowerPC 604 processor", 0 }, - { "604e" , "Select the PowerPC 604e processor", 0 }, - { "620" , "Select the PowerPC 620 processor", 0 }, - { "7400" , "Select the PowerPC 7400 (G4) processor", - PowerPCFeatureAltivec }, - { "7450" , "Select the PowerPC 7450 (G4+) processor", - PowerPCFeatureAltivec }, - { "750" , "Select the PowerPC 750 (G3) processor", 0 }, - { "970" , "Select the PowerPC 970 (G5 - GPUL) processor", - PowerPCFeature64Bit | PowerPCFeatureAltivec | - PowerPCFeatureFSqrt | PowerPCFeatureGPUL }, - { "g3" , "Select the PowerPC G3 (750) processor", 0 }, - { "g4" , "Select the PowerPC G4 (7400) processor", - PowerPCFeatureAltivec }, - { "g4+" , "Select the PowerPC G4+ (7450) processor", - PowerPCFeatureAltivec }, - { "g5" , "Select the PowerPC g5 (970 - GPUL) processor", - PowerPCFeature64Bit | PowerPCFeatureAltivec | - PowerPCFeatureFSqrt | PowerPCFeatureGPUL }, - { "generic", "Select instructions for a generic PowerPC processor", 0 } -}; -/// Length of PowerPCSubTypeKV. -static const unsigned PowerPCSubTypeKVSize = sizeof(PowerPCSubTypeKV) - / sizeof(SubtargetFeatureKV); - -/// Sorted (by key) array of values for CPU features. -static SubtargetFeatureKV PowerPCFeatureKV[] = { - { "64bit" , "Should 64 bit instructions be used" , PowerPCFeature64Bit }, - { "altivec", "Should Altivec instructions be used" , PowerPCFeatureAltivec }, - { "fsqrt" , "Should the fsqrt instruction be used", PowerPCFeatureFSqrt }, - { "gpul" , "Should GPUL instructions be used" , PowerPCFeatureGPUL } - }; -/// Length of PowerPCFeatureKV. -static const unsigned PowerPCFeatureKVSize = sizeof(PowerPCFeatureKV) - / sizeof(SubtargetFeatureKV); - #if defined(__APPLE__) #include @@ -119,32 +56,83 @@ static const char *GetCurrentPowerPCCPU() { } #endif -PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS) - : StackAlignment(16), IsGigaProcessor(false), IsAIX(false), IsDarwin(false) { + +PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &FS, + bool is64Bit) + : StackAlignment(16) + , DarwinDirective(PPC::DIR_NONE) + , IsGigaProcessor(false) + , Has64BitSupport(false) + , Use64BitRegs(false) + , IsPPC64(is64Bit) + , HasAltivec(false) + , HasFSQRT(false) + , HasSTFIWX(false) + , HasLazyResolverStubs(false) + , DarwinVers(0) { // Determine default and user specified characteristics std::string CPU = "generic"; #if defined(__APPLE__) CPU = GetCurrentPowerPCCPU(); #endif - uint32_t Bits = - SubtargetFeatures::Parse(FS, CPU, - PowerPCSubTypeKV, PowerPCSubTypeKVSize, - PowerPCFeatureKV, PowerPCFeatureKVSize); - IsGigaProcessor = (Bits & PowerPCFeatureGPUL ) != 0; - Is64Bit = (Bits & PowerPCFeature64Bit) != 0; - HasFSQRT = (Bits & PowerPCFeatureFSqrt) != 0; + // Parse features string. + ParseSubtargetFeatures(FS, CPU); + + // If we are generating code for ppc64, verify that options make sense. + if (is64Bit) { + Has64BitSupport = true; + // Silently force 64-bit register use on ppc64. + Use64BitRegs = true; + } + + // If the user requested use of 64-bit regs, but the cpu selected doesn't + // support it, ignore. + if (use64BitRegs() && !has64BitSupport()) + Use64BitRegs = false; + // Set the boolean corresponding to the current target triple, or the default // if one cannot be determined, to true. - const std::string& TT = M.getTargetTriple(); - if (TT.length() > 5) { - IsDarwin = TT.find("darwin") != std::string::npos; - } else if (TT.empty()) { -#if defined(_POWER) - IsAIX = true; -#elif defined(__APPLE__) - IsDarwin = true; -#endif + if (TT.length() > 7) { + // Determine which version of darwin this is. + size_t DarwinPos = TT.find("-darwin"); + if (DarwinPos != std::string::npos) { + if (isdigit(TT[DarwinPos+7])) + DarwinVers = atoi(&TT[DarwinPos+7]); + else + DarwinVers = 8; // Minimum supported darwin is Tiger. + } } + + // Set up darwin-specific properties. + if (isDarwin()) + HasLazyResolverStubs = true; +} + +/// SetJITMode - This is called to inform the subtarget info that we are +/// producing code for the JIT. +void PPCSubtarget::SetJITMode() { + // JIT mode doesn't want lazy resolver stubs, it knows exactly where + // everything is. This matters for PPC64, which codegens in PIC mode without + // stubs. + HasLazyResolverStubs = false; +} + + +/// hasLazyResolverStub - Return true if accesses to the specified global have +/// to go through a dyld lazy resolution stub. This means that an extra load +/// is required to get the address of the global. +bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV, + const TargetMachine &TM) const { + // We never hae stubs if HasLazyResolverStubs=false or if in static mode. + if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static) + return false; + // If symbol visibility is hidden, the extra load is not needed if + // the symbol is definitely defined in the current translation unit. + bool isDecl = GV->isDeclaration() && !GV->isMaterializable(); + if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage()) + return false; + return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() || + GV->hasCommonLinkage() || isDecl; }