X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FPowerPC%2FPPCTargetMachine.h;h=b8078bdb5b6083eed7ea5c21d27e94237c068c17;hb=875710a2fd6b3c4f814961582594bd5c1cdb493a;hp=794123ad164148a65dc74694e5821eb8b6ba9773;hpb=6c05796294a7a0693d96c0c87194b9d5ddf55a94;p=oota-llvm.git diff --git a/lib/Target/PowerPC/PPCTargetMachine.h b/lib/Target/PowerPC/PPCTargetMachine.h index 794123ad164..b8078bdb5b6 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.h +++ b/lib/Target/PowerPC/PPCTargetMachine.h @@ -1,4 +1,4 @@ -//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=// +//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -14,104 +14,53 @@ #ifndef PPC_TARGETMACHINE_H #define PPC_TARGETMACHINE_H -#include "PPCFrameInfo.h" -#include "PPCSubtarget.h" -#include "PPCJITInfo.h" #include "PPCInstrInfo.h" -#include "PPCISelLowering.h" -#include "PPCMachOWriterInfo.h" +#include "PPCSubtarget.h" +#include "llvm/IR/DataLayout.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetData.h" namespace llvm { -class PassManager; -class GlobalValue; /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets. /// class PPCTargetMachine : public LLVMTargetMachine { PPCSubtarget Subtarget; - const TargetData DataLayout; // Calculates type size & alignment - PPCInstrInfo InstrInfo; - PPCFrameInfo FrameInfo; - PPCJITInfo JITInfo; - PPCTargetLowering TLInfo; - InstrItineraryData InstrItins; - PPCMachOWriterInfo MachOWriterInfo; - -protected: - virtual const TargetAsmInfo *createTargetAsmInfo() const; - - // To avoid having target depend on the asmprinter stuff libraries, asmprinter - // set this functions to ctor pointer at startup time if they are linked in. - typedef FunctionPass *(*AsmPrinterCtorFn)(formatted_raw_ostream &o, - TargetMachine &m, - bool verbose); - static AsmPrinterCtorFn AsmPrinterCtor; public: - PPCTargetMachine(const Target &T, const Module &M, const std::string &FS, - bool is64Bit); - - virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; } - virtual const PPCFrameInfo *getFrameInfo() const { return &FrameInfo; } - virtual PPCJITInfo *getJITInfo() { return &JITInfo; } - virtual PPCTargetLowering *getTargetLowering() const { - return const_cast(&TLInfo); - } - virtual const PPCRegisterInfo *getRegisterInfo() const { - return &InstrInfo.getRegisterInfo(); - } - - virtual const TargetData *getTargetData() const { return &DataLayout; } - virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; } - virtual const InstrItineraryData getInstrItineraryData() const { - return InstrItins; - } - virtual const PPCMachOWriterInfo *getMachOWriterInfo() const { - return &MachOWriterInfo; - } + PPCTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL, bool is64Bit); - static void registerAsmPrinter(AsmPrinterCtorFn F) { - AsmPrinterCtor = F; - } + const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; } // Pass Pipeline Configuration - virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel); - virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel); - virtual bool addAssemblyEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - bool Verbose, formatted_raw_ostream &Out); - virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); - virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE); - virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - bool DumpAsm, MachineCodeEmitter &MCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - bool DumpAsm, JITCodeEmitter &JCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, - CodeGenOpt::Level OptLevel, - bool DumpAsm, ObjectCodeEmitter &OCE); - virtual bool getEnableTailMergeDefault() const; + TargetPassConfig *createPassConfig(PassManagerBase &PM) override; + + /// \brief Register PPC analysis passes with a pass manager. + void addAnalysisPasses(PassManagerBase &PM) override; }; /// PPC32TargetMachine - PowerPC 32-bit target machine. /// class PPC32TargetMachine : public PPCTargetMachine { + virtual void anchor(); public: - PPC32TargetMachine(const Target &T, const Module &M, const std::string &FS); + PPC32TargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); }; /// PPC64TargetMachine - PowerPC 64-bit target machine. /// class PPC64TargetMachine : public PPCTargetMachine { + virtual void anchor(); public: - PPC64TargetMachine(const Target &T, const Module &M, const std::string &FS); + PPC64TargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); }; } // end namespace llvm