X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FSparc%2FSparcAsmPrinter.cpp;h=edde8427aa896aec0caab516db314ec7f3a5eb4b;hb=94ca42ff0407d71bacc41de4032d8dbe6358d33d;hp=5eacb816ae14a02e153197db2901e24a6197a2aa;hpb=45090476be69a3f860e83f2c0fe2a2df7e1b4c89;p=oota-llvm.git diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp index 5eacb816ae1..edde8427aa8 100644 --- a/lib/Target/Sparc/SparcAsmPrinter.cpp +++ b/lib/Target/Sparc/SparcAsmPrinter.cpp @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -12,294 +12,240 @@ // //===----------------------------------------------------------------------===// +#define DEBUG_TYPE "asm-printer" #include "Sparc.h" #include "SparcInstrInfo.h" -#include "llvm/Constants.h" -#include "llvm/DerivedTypes.h" -#include "llvm/Module.h" -#include "llvm/Assembly/Writer.h" +#include "SparcTargetMachine.h" #include "llvm/CodeGen/AsmPrinter.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Support/Mangler.h" -#include "llvm/ADT/Statistic.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Target/Mangler.h" +#include "llvm/Target/TargetRegistry.h" +#include "llvm/ADT/SmallString.h" #include "llvm/ADT/StringExtras.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Support/MathExtras.h" -#include -#include +#include "llvm/Support/raw_ostream.h" using namespace llvm; namespace { - Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed"); - - struct SparcAsmPrinter : public AsmPrinter { - SparcAsmPrinter(std::ostream &O, TargetMachine &TM) : AsmPrinter(O, TM) { - Data16bitsDirective = "\t.half\t"; - Data32bitsDirective = "\t.word\t"; - Data64bitsDirective = 0; // .xword is only supported by V9. - ZeroDirective = "\t.skip\t"; - CommentString = "!"; - ConstantPoolSection = "\t.section \".rodata\",#alloc\n"; - } - - /// We name each basic block in a Function with a unique number, so - /// that we can consistently refer to them later. This is cleared - /// at the beginning of each call to runOnMachineFunction(). - /// - typedef std::map ValueMapTy; - ValueMapTy NumberForBB; + class SparcAsmPrinter : public AsmPrinter { + public: + explicit SparcAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) + : AsmPrinter(TM, Streamer) {} virtual const char *getPassName() const { return "Sparc Assembly Printer"; } - void printOperand(const MachineInstr *MI, int opNum); - void printMemOperand(const MachineInstr *MI, int opNum, + void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS); + void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS, const char *Modifier = 0); - void printCCOperand(const MachineInstr *MI, int opNum); + void printCCOperand(const MachineInstr *MI, int opNum, raw_ostream &OS); - bool printInstruction(const MachineInstr *MI); // autogenerated. - bool runOnMachineFunction(MachineFunction &F); - bool doInitialization(Module &M); - bool doFinalization(Module &M); + virtual void EmitInstruction(const MachineInstr *MI) { + SmallString<128> Str; + raw_svector_ostream OS(Str); + printInstruction(MI, OS); + OutStreamer.EmitRawText(OS.str()); + } + void printInstruction(const MachineInstr *MI, raw_ostream &OS);// autogen'd. + static const char *getRegisterName(unsigned RegNo); + + bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, + unsigned AsmVariant, const char *ExtraCode, + raw_ostream &O); + bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, + unsigned AsmVariant, const char *ExtraCode, + raw_ostream &O); + + bool printGetPCX(const MachineInstr *MI, unsigned OpNo, raw_ostream &OS); + + virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) + const; }; } // end of anonymous namespace #include "SparcGenAsmWriter.inc" -/// createSparcCodePrinterPass - Returns a pass that prints the SPARC -/// assembly code for a MachineFunction to the given output stream, -/// using the given target machine description. This should work -/// regardless of whether the function is in SSA form. -/// -FunctionPass *llvm::createSparcCodePrinterPass(std::ostream &o, - TargetMachine &tm) { - return new SparcAsmPrinter(o, tm); -} - -/// runOnMachineFunction - This uses the printMachineInstruction() -/// method to print assembly for each instruction. -/// -bool SparcAsmPrinter::runOnMachineFunction(MachineFunction &MF) { - SetupMachineFunction(MF); - - // Print out constants referenced by the function - EmitConstantPool(MF.getConstantPool()); - - // BBNumber is used here so that a given Printer will never give two - // BBs the same name. (If you have a better way, please let me know!) - static unsigned BBNumber = 0; - - O << "\n\n"; - // What's my mangled name? - CurrentFnName = Mang->getValueName(MF.getFunction()); - - // Print out labels for the function. - O << "\t.text\n"; - O << "\t.align 16\n"; - O << "\t.globl\t" << CurrentFnName << "\n"; - O << "\t.type\t" << CurrentFnName << ", #function\n"; - O << CurrentFnName << ":\n"; - - // Number each basic block so that we can consistently refer to them - // in PC-relative references. - NumberForBB.clear(); - for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); - I != E; ++I) { - NumberForBB[I->getBasicBlock()] = BBNumber++; - } - - // Print out code for the function. - for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); - I != E; ++I) { - // Print a label for the basic block. - if (I != MF.begin()) - O << ".LBB" << Mang->getValueName(MF.getFunction ()) - << "_" << I->getNumber () << ":\t! " - << I->getBasicBlock ()->getName () << "\n"; - for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); - II != E; ++II) { - // Print the assembly for the instruction. - O << "\t"; - printInstruction(II); - ++EmittedInsts; - } - } - - // We didn't modify anything. - return false; -} - -void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) { +void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum, + raw_ostream &O) { const MachineOperand &MO = MI->getOperand (opNum); - const MRegisterInfo &RI = *TM.getRegisterInfo(); bool CloseParen = false; - if (MI->getOpcode() == SP::SETHIi && !MO.isRegister() && !MO.isImmediate()) { + if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) { O << "%hi("; CloseParen = true; - } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) - && !MO.isRegister() && !MO.isImmediate()) { + } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) && + !MO.isReg() && !MO.isImm()) { O << "%lo("; CloseParen = true; } switch (MO.getType()) { - case MachineOperand::MO_VirtualRegister: - if (Value *V = MO.getVRegValueOrNull()) { - O << "<" << V->getName() << ">"; - break; - } - // FALLTHROUGH - case MachineOperand::MO_MachineRegister: - if (MRegisterInfo::isPhysicalRegister(MO.getReg())) - O << "%" << LowercaseString (RI.get(MO.getReg()).Name); - else - O << "%reg" << MO.getReg(); + case MachineOperand::MO_Register: + O << "%" << LowercaseString(getRegisterName(MO.getReg())); break; - case MachineOperand::MO_SignExtendedImmed: - case MachineOperand::MO_UnextendedImmed: - O << (int)MO.getImmedValue(); + case MachineOperand::MO_Immediate: + O << (int)MO.getImm(); break; - case MachineOperand::MO_MachineBasicBlock: { - MachineBasicBlock *MBBOp = MO.getMachineBasicBlock(); - O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction()) - << "_" << MBBOp->getNumber () << "\t! " - << MBBOp->getBasicBlock ()->getName (); - return; - } - case MachineOperand::MO_PCRelativeDisp: - std::cerr << "Shouldn't use addPCDisp() when building Sparc MachineInstrs"; - abort (); + case MachineOperand::MO_MachineBasicBlock: + O << *MO.getMBB()->getSymbol(); return; case MachineOperand::MO_GlobalAddress: - O << Mang->getValueName(MO.getGlobal()); + O << *Mang->getSymbol(MO.getGlobal()); break; case MachineOperand::MO_ExternalSymbol: O << MO.getSymbolName(); break; case MachineOperand::MO_ConstantPoolIndex: - O << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_" - << MO.getConstantPoolIndex(); + O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_" + << MO.getIndex(); break; default: - O << ""; abort (); break; + llvm_unreachable(""); } if (CloseParen) O << ")"; } void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum, - const char *Modifier) { - printOperand(MI, opNum); - + raw_ostream &O, const char *Modifier) { + printOperand(MI, opNum, O); + // If this is an ADD operand, emit it like normal operands. if (Modifier && !strcmp(Modifier, "arith")) { O << ", "; - printOperand(MI, opNum+1); + printOperand(MI, opNum+1, O); return; } - - MachineOperand::MachineOperandType OpTy = MI->getOperand(opNum+1).getType(); - - if ((OpTy == MachineOperand::MO_VirtualRegister || - OpTy == MachineOperand::MO_MachineRegister) && + + if (MI->getOperand(opNum+1).isReg() && MI->getOperand(opNum+1).getReg() == SP::G0) return; // don't print "+%g0" - if ((OpTy == MachineOperand::MO_SignExtendedImmed || - OpTy == MachineOperand::MO_UnextendedImmed) && - MI->getOperand(opNum+1).getImmedValue() == 0) + if (MI->getOperand(opNum+1).isImm() && + MI->getOperand(opNum+1).getImm() == 0) return; // don't print "+0" - + O << "+"; - if (OpTy == MachineOperand::MO_GlobalAddress || - OpTy == MachineOperand::MO_ConstantPoolIndex) { + if (MI->getOperand(opNum+1).isGlobal() || + MI->getOperand(opNum+1).isCPI()) { O << "%lo("; - printOperand(MI, opNum+1); + printOperand(MI, opNum+1, O); O << ")"; } else { - printOperand(MI, opNum+1); + printOperand(MI, opNum+1, O); + } +} + +bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum, + raw_ostream &O) { + std::string operand = ""; + const MachineOperand &MO = MI->getOperand(opNum); + switch (MO.getType()) { + default: assert(0 && "Operand is not a register "); + case MachineOperand::MO_Register: + assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && + "Operand is not a physical register "); + assert(MO.getReg() != SP::O7 && + "%o7 is assigned as destination for getpcx!"); + operand = "%" + LowercaseString(getRegisterName(MO.getReg())); + break; } + + unsigned mfNum = MI->getParent()->getParent()->getFunctionNumber(); + unsigned bbNum = MI->getParent()->getNumber(); + + O << '\n' << ".LLGETPCH" << mfNum << '_' << bbNum << ":\n"; + O << "\tcall\t.LLGETPC" << mfNum << '_' << bbNum << '\n' ; + + O << "\t sethi\t" + << "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum + << ")), " << operand << '\n' ; + + O << ".LLGETPC" << mfNum << '_' << bbNum << ":\n" ; + O << "\tor\t" << operand + << ", %lo(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum + << ")), " << operand << '\n'; + O << "\tadd\t" << operand << ", %o7, " << operand << '\n'; + + return true; } -void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum) { - int CC = (int)MI->getOperand(opNum).getImmedValue(); +void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum, + raw_ostream &O) { + int CC = (int)MI->getOperand(opNum).getImm(); O << SPARCCondCodeToString((SPCC::CondCodes)CC); } +/// PrintAsmOperand - Print out an operand for an inline asm expression. +/// +bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, + unsigned AsmVariant, + const char *ExtraCode, + raw_ostream &O) { + if (ExtraCode && ExtraCode[0]) { + if (ExtraCode[1] != 0) return true; // Unknown modifier. + + switch (ExtraCode[0]) { + default: return true; // Unknown modifier. + case 'r': + break; + } + } + printOperand(MI, OpNo, O); -bool SparcAsmPrinter::doInitialization(Module &M) { - Mang = new Mangler(M); - return false; // success + return false; } -bool SparcAsmPrinter::doFinalization(Module &M) { - const TargetData &TD = TM.getTargetData(); +bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, + unsigned OpNo, unsigned AsmVariant, + const char *ExtraCode, + raw_ostream &O) { + if (ExtraCode && ExtraCode[0]) + return true; // Unknown modifier - // Print out module-level global variables here. - for (Module::const_global_iterator I = M.global_begin(), E = M.global_end(); I != E; ++I) - if (I->hasInitializer()) { // External global require no code - O << "\n\n"; - std::string name = Mang->getValueName(I); - Constant *C = I->getInitializer(); - unsigned Size = TD.getTypeSize(C->getType()); - unsigned Align = TD.getTypeAlignment(C->getType()); + O << '['; + printMemOperand(MI, OpNo, O); + O << ']'; - if (C->isNullValue() && - (I->hasLinkOnceLinkage() || I->hasInternalLinkage() || - I->hasWeakLinkage() /* FIXME: Verify correct */)) { - SwitchSection(".data", I); - if (I->hasInternalLinkage()) - O << "\t.local " << name << "\n"; + return false; +} - O << "\t.comm " << name << "," << TD.getTypeSize(C->getType()) - << "," << (unsigned)TD.getTypeAlignment(C->getType()); - O << "\t\t! "; - WriteAsOperand(O, I, true, true, &M); - O << "\n"; - } else { - switch (I->getLinkage()) { - case GlobalValue::LinkOnceLinkage: - case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak. - // Nonnull linkonce -> weak - O << "\t.weak " << name << "\n"; - SwitchSection("", I); - O << "\t.section\t\".llvm.linkonce.d." << name - << "\",\"aw\",@progbits\n"; - break; +/// isBlockOnlyReachableByFallthough - Return true if the basic block has +/// exactly one predecessor and the control transfer mechanism between +/// the predecessor and this block is a fall-through. +/// +/// This overrides AsmPrinter's implementation to handle delay slots. +bool SparcAsmPrinter:: +isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const { + // If this is a landing pad, it isn't a fall through. If it has no preds, + // then nothing falls through to it. + if (MBB->isLandingPad() || MBB->pred_empty()) + return false; + + // If there isn't exactly one predecessor, it can't be a fall through. + MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI; + ++PI2; + if (PI2 != MBB->pred_end()) + return false; + + // The predecessor has to be immediately before this block. + const MachineBasicBlock *Pred = *PI; + + if (!Pred->isLayoutSuccessor(MBB)) + return false; + + // Check if the last terminator is an unconditional branch. + MachineBasicBlock::const_iterator I = Pred->end(); + while (I != Pred->begin() && !(--I)->getDesc().isTerminator()) + ; // Noop + return I == Pred->end() || !I->getDesc().isBarrier(); +} - case GlobalValue::AppendingLinkage: - // FIXME: appending linkage variables should go into a section of - // their name or something. For now, just emit them as external. - case GlobalValue::ExternalLinkage: - // If external or appending, declare as a global symbol - O << "\t.globl " << name << "\n"; - // FALL THROUGH - case GlobalValue::InternalLinkage: - if (C->isNullValue()) - SwitchSection(".bss", I); - else - SwitchSection(".data", I); - break; - case GlobalValue::GhostLinkage: - std::cerr << "Should not have any unmaterialized functions!\n"; - abort(); - } - O << "\t.align " << Align << "\n"; - O << "\t.type " << name << ",#object\n"; - O << "\t.size " << name << "," << Size << "\n"; - O << name << ":\t\t\t\t! "; - WriteAsOperand(O, I, true, true, &M); - O << " = "; - WriteAsOperand(O, C, false, false, &M); - O << "\n"; - EmitGlobalConstant(C); - } - } - AsmPrinter::doFinalization(M); - return false; // success +// Force static initialization. +extern "C" void LLVMInitializeSparcAsmPrinter() { + RegisterAsmPrinter X(TheSparcTarget); + RegisterAsmPrinter Y(TheSparcV9Target); }