X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FSparc%2FSparcInstrFormats.td;h=dca6852ae4beb9505785202b0a052a76f7e7fc2d;hb=749b758b2efee9c74bd4d2f7614c8153d60ee16d;hp=503a0ec202eb37ecb03395132f220afee0b00f89;hpb=e33a3ff942d33edfb619867c84b1d4589d3a582d;p=oota-llvm.git diff --git a/lib/Target/Sparc/SparcInstrFormats.td b/lib/Target/Sparc/SparcInstrFormats.td index 503a0ec202e..dca6852ae4b 100644 --- a/lib/Target/Sparc/SparcInstrFormats.td +++ b/lib/Target/Sparc/SparcInstrFormats.td @@ -1,4 +1,4 @@ -//===- SparcV8InstrFormats.td - SparcV8 Instr Formats ------*- tablegen -*-===// +//===- SparcInstrFormats.td - Sparc Instruction Formats ----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // @@ -7,11 +7,26 @@ // //===----------------------------------------------------------------------===// +class InstSP pattern> : Instruction { + field bits<32> Inst; + + let Namespace = "SP"; + + bits<2> op; + let Inst{31-30} = op; // Top two bits are the 'op' field + + dag OperandList = ops; + let AsmString = asmstr; + let Pattern = pattern; +} + //===----------------------------------------------------------------------===// -// Format #2 instruction classes in the SparcV8 +// Format #2 instruction classes in the Sparc //===----------------------------------------------------------------------===// -class F2 : InstV8 { // Format 2 instructions +// Format 2 instructions +class F2 pattern> + : InstSP { bits<3> op2; bits<22> imm22; let op = 0; // op = 0 @@ -21,24 +36,20 @@ class F2 : InstV8 { // Format 2 instructions // Specific F2 classes: SparcV8 manual, page 44 // -class F2_1 op2Val, dag ops, string asmstr> : F2 { +class F2_1 op2Val, dag ops, string asmstr, list pattern> + : F2 { bits<5> rd; - dag OperandList = ops; - let AsmString = asmstr; - let op2 = op2Val; let Inst{29-25} = rd; } -class F2_2 condVal, bits<3> op2Val, dag ops, string asmstr> : F2 { +class F2_2 condVal, bits<3> op2Val, dag ops, string asmstr, + list pattern> : F2 { bits<4> cond; bit annul = 0; // currently unused - dag OperandList = ops; - let AsmString = asmstr; - let cond = condVal; let op2 = op2Val; @@ -47,10 +58,11 @@ class F2_2 condVal, bits<3> op2Val, dag ops, string asmstr> : F2 { } //===----------------------------------------------------------------------===// -// Format #3 instruction classes in the SparcV8 +// Format #3 instruction classes in the Sparc //===----------------------------------------------------------------------===// -class F3 : InstV8 { +class F3 pattern> + : InstSP { bits<5> rd; bits<6> op3; bits<5> rs1; @@ -63,14 +75,10 @@ class F3 : InstV8 { // Specific F3 classes: SparcV8 manual, page 44 // class F3_1 opVal, bits<6> op3val, dag ops, - string asmstr, list pattern> : F3 { - bits<8> asi = 0; // asi not currently used in SparcV8 + string asmstr, list pattern> : F3 { + bits<8> asi = 0; // asi not currently used bits<5> rs2; - dag OperandList = ops; - let AsmString = asmstr; - let Pattern = pattern; - let op = opVal; let op3 = op3val; @@ -80,13 +88,9 @@ class F3_1 opVal, bits<6> op3val, dag ops, } class F3_2 opVal, bits<6> op3val, dag ops, - string asmstr, list pattern> : F3 { + string asmstr, list pattern> : F3 { bits<13> simm13; - dag OperandList = ops; - let AsmString = asmstr; - let Pattern = pattern; - let op = opVal; let op3 = op3val; @@ -96,12 +100,9 @@ class F3_2 opVal, bits<6> op3val, dag ops, // floating-point class F3_3 opVal, bits<6> op3val, bits<9> opfval, dag ops, - string asmstr> : F3 { + string asmstr, list pattern> : F3 { bits<5> rs2; - dag OperandList = ops; - let AsmString = asmstr; - let op = opVal; let op3 = op3val;