X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FSparc%2FSparcTargetMachine.cpp;h=b84eab568d2909b9d8206b5078a65ea4b4d0ace1;hb=a5e62019d771fd0b01311cc0136e64b66b299eb1;hp=d749a7c0a944f7634848871e50addef73840fc0b;hpb=8d8a6bc7a36ccf517354c325aa5ca9a127776d0f;p=oota-llvm.git

diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index d749a7c0a94..b84eab568d2 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -1,58 +1,67 @@
-//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
-// 
+//===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
+//
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
 //===----------------------------------------------------------------------===//
-// 
+//
 //
 //===----------------------------------------------------------------------===//
 
-#include "SparcV8TargetMachine.h"
-#include "SparcV8.h"
-#include "llvm/Module.h"
+#include "Sparc.h"
+#include "SparcMCAsmInfo.h"
+#include "SparcTargetMachine.h"
 #include "llvm/PassManager.h"
-#include "llvm/Target/TargetMachineImpls.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetRegistry.h"
 using namespace llvm;
 
-// allocateSparcV8TargetMachine - Allocate and return a subclass of 
-// TargetMachine that implements the SparcV8 backend.
-//
-TargetMachine *llvm::allocateSparcV8TargetMachine(const Module &M,
-                                                  IntrinsicLowering *IL) {
-  return new SparcV8TargetMachine(M, IL);
+extern "C" void LLVMInitializeSparcTarget() {
+  // Register the target.
+  RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
+  RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
+
+  RegisterAsmInfo<SparcELFMCAsmInfo> A(TheSparcTarget);
+  RegisterAsmInfo<SparcELFMCAsmInfo> B(TheSparcV9Target);
+
 }
 
-/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
+/// SparcTargetMachine ctor - Create an ILP32 architecture model
 ///
-SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
-                                           IntrinsicLowering *IL)
-  : TargetMachine("SparcV8", IL, true, 4, 4, 4, 4, 4),
-    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 4), JITInfo(*this) {
+SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT, 
+                                       const std::string &FS, bool is64bit)
+  : LLVMTargetMachine(T, TT),
+    Subtarget(TT, FS, is64bit),
+    DataLayout(Subtarget.getDataLayout()),
+    TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget),
+    FrameLowering(Subtarget) {
 }
 
-/// addPassesToEmitAssembly - Add passes to the specified pass manager
-/// to implement a static compiler for this target.
-///
-bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
-					       std::ostream &Out) {
-  // <insert instruction selector passes here>
-  PM.add(createRegisterAllocator());
-  PM.add(createPrologEpilogCodeInserter());
-  // <insert assembly code output passes here>
-  PM.add(createMachineCodeDeleter());
-  return true; // change to `return false' when this actually works.
+bool SparcTargetMachine::addInstSelector(PassManagerBase &PM,
+                                         CodeGenOpt::Level OptLevel) {
+  PM.add(createSparcISelDag(*this));
+  return false;
 }
 
-/// addPassesToJITCompile - Add passes to the specified pass manager to
-/// implement a fast dynamic compiler for this target.
-///
-void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
-  // <insert instruction selector passes here>
-  PM.add(createRegisterAllocator());
-  PM.add(createPrologEpilogCodeInserter());
+/// addPreEmitPass - This pass may be implemented by targets that want to run
+/// passes immediately before machine code is emitted.  This should return
+/// true if -print-machineinstrs should print out the code after the passes.
+bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM,
+                                        CodeGenOpt::Level OptLevel){
+  PM.add(createSparcFPMoverPass(*this));
+  PM.add(createSparcDelaySlotFillerPass(*this));
+  return true;
+}
+
+SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
+                                           const std::string &TT, 
+                                           const std::string &FS)
+  : SparcTargetMachine(T, TT, FS, false) {
+}
+
+SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, 
+                                           const std::string &TT, 
+                                           const std::string &FS)
+  : SparcTargetMachine(T, TT, FS, true) {
 }