X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FSparc%2FSparcTargetMachine.cpp;h=b84eab568d2909b9d8206b5078a65ea4b4d0ace1;hb=a5e62019d771fd0b01311cc0136e64b66b299eb1;hp=e0ab42edda179ba27c58b30a38c20e95ae9d695b;hpb=cb3718832375a581c5ea23f15918f3ea447a446c;p=oota-llvm.git diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp index e0ab42edda1..b84eab568d2 100644 --- a/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/lib/Target/Sparc/SparcTargetMachine.cpp @@ -10,57 +10,36 @@ // //===----------------------------------------------------------------------===// -#include "SparcTargetAsmInfo.h" -#include "SparcTargetMachine.h" #include "Sparc.h" -#include "llvm/Module.h" +#include "SparcMCAsmInfo.h" +#include "SparcTargetMachine.h" #include "llvm/PassManager.h" -#include "llvm/Target/TargetMachineRegistry.h" +#include "llvm/Target/TargetRegistry.h" using namespace llvm; -// Register the target. -static RegisterTarget X("sparc", " SPARC"); +extern "C" void LLVMInitializeSparcTarget() { + // Register the target. + RegisterTargetMachine X(TheSparcTarget); + RegisterTargetMachine Y(TheSparcV9Target); + + RegisterAsmInfo A(TheSparcTarget); + RegisterAsmInfo B(TheSparcV9Target); -const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const { - // FIXME: Handle Solaris subtarget someday :) - return new SparcELFTargetAsmInfo(*this); } /// SparcTargetMachine ctor - Create an ILP32 architecture model /// -SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS) - : DataLayout("E-p:32:32-f128:128:128"), - Subtarget(M, FS), InstrInfo(Subtarget), - FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { -} - -unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) { - std::string TT = M.getTargetTriple(); - if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-") - return 20; - - // If the target triple is something non-sparc, we don't match. - if (!TT.empty()) return 0; - - if (M.getEndianness() == Module::BigEndian && - M.getPointerSize() == Module::Pointer32) -#ifdef __sparc__ - return 20; // BE/32 ==> Prefer sparc on sparc -#else - return 5; // BE/32 ==> Prefer ppc elsewhere -#endif - else if (M.getEndianness() != Module::AnyEndianness || - M.getPointerSize() != Module::AnyPointerSize) - return 0; // Match for some other target - -#if defined(__sparc__) - return 10; -#else - return 0; -#endif +SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT, + const std::string &FS, bool is64bit) + : LLVMTargetMachine(T, TT), + Subtarget(TT, FS, is64bit), + DataLayout(Subtarget.getDataLayout()), + TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget), + FrameLowering(Subtarget) { } -bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, + CodeGenOpt::Level OptLevel) { PM.add(createSparcISelDag(*this)); return false; } @@ -68,15 +47,21 @@ bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { /// addPreEmitPass - This pass may be implemented by targets that want to run /// passes immediately before machine code is emitted. This should return /// true if -print-machineinstrs should print out the code after the passes. -bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) { +bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, + CodeGenOpt::Level OptLevel){ PM.add(createSparcFPMoverPass(*this)); PM.add(createSparcDelaySlotFillerPass(*this)); return true; } -bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - raw_ostream &Out) { - // Output assembly language. - PM.add(createSparcCodePrinterPass(Out, *this)); - return false; +SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, + const std::string &TT, + const std::string &FS) + : SparcTargetMachine(T, TT, FS, false) { +} + +SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, + const std::string &TT, + const std::string &FS) + : SparcTargetMachine(T, TT, FS, true) { }