X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FSparc%2FSparcTargetMachine.cpp;h=cabfce118aa11ae44e1a8a4f326f37792071bd80;hb=2e9d5f912a9841d3685ba0241abe1131943fed29;hp=f9a499dca43f8a7ac77ce6a609162bb2abd65632;hpb=1c809c594b8339fff4746c08e34914fffc3242e4;p=oota-llvm.git

diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index f9a499dca43..cabfce118aa 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -1,67 +1,93 @@
-//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
-// 
+//===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
+//
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
 //===----------------------------------------------------------------------===//
-// 
+//
 //
 //===----------------------------------------------------------------------===//
 
-#include "SparcV8TargetMachine.h"
-#include "SparcV8.h"
+#include "SparcTargetAsmInfo.h"
+#include "SparcTargetMachine.h"
+#include "Sparc.h"
 #include "llvm/Module.h"
 #include "llvm/PassManager.h"
-#include "llvm/Target/TargetMachineImpls.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetMachineRegistry.h"
 using namespace llvm;
 
-// allocateSparcV8TargetMachine - Allocate and return a subclass of 
-// TargetMachine that implements the SparcV8 backend.
-//
-TargetMachine *llvm::allocateSparcV8TargetMachine(const Module &M,
-                                                  IntrinsicLowering *IL) {
-  return new SparcV8TargetMachine(M, IL);
-}
+/// SparcTargetMachineModule - Note that this is used on hosts that
+/// cannot link in a library unless there are references into the
+/// library.  In particular, it seems that it is not possible to get
+/// things to work on Win32 without this.  Though it is unused, do not
+/// remove it.
+extern "C" int SparcTargetMachineModule;
+int SparcTargetMachineModule = 0;
 
-/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
-///
-SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
-                                           IntrinsicLowering *IL)
-  : TargetMachine("SparcV8", IL, true, 4, 4, 4, 4, 4),
-    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 4), JITInfo(*this) {
+// Register the target.
+static RegisterTarget<SparcTargetMachine> X("sparc", "SPARC");
+
+const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
+  // FIXME: Handle Solaris subtarget someday :)
+  return new SparcELFTargetAsmInfo(*this);
 }
 
-/// addPassesToEmitAssembly - Add passes to the specified pass manager
-/// to implement a static compiler for this target.
+/// SparcTargetMachine ctor - Create an ILP32 architecture model
 ///
-bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
-					       std::ostream &Out) {
-  PM.add(createSparcV8SimpleInstructionSelector(*this));
+SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
+  : DataLayout("E-p:32:32-f128:128:128"),
+    Subtarget(M, FS), TLInfo(*this), InstrInfo(Subtarget),
+    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
+}
 
-  // Print machine instructions as they are created.
-  PM.add(createMachineFunctionPrinterPass(&std::cerr));
+unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
+  std::string TT = M.getTargetTriple();
+  if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
+    return 20;
+  
+  // If the target triple is something non-sparc, we don't match.
+  if (!TT.empty()) return 0;
 
-  PM.add(createRegisterAllocator());
-  PM.add(createPrologEpilogCodeInserter());
-  // <insert assembly code output passes here>
+  if (M.getEndianness()  == Module::BigEndian &&
+      M.getPointerSize() == Module::Pointer32)
+#ifdef __sparc__
+    return 20;   // BE/32 ==> Prefer sparc on sparc
+#else
+    return 5;    // BE/32 ==> Prefer ppc elsewhere
+#endif
+  else if (M.getEndianness() != Module::AnyEndianness ||
+           M.getPointerSize() != Module::AnyPointerSize)
+    return 0;                                    // Match for some other target
 
-  // This is not a correct asm writer by any means, but at least we see what we
-  // are producing.
-  PM.add(createMachineFunctionPrinterPass(&Out));
+#if defined(__sparc__)
+  return 10;
+#else
+  return 0;
+#endif
+}
 
-  PM.add(createMachineCodeDeleter());
+bool SparcTargetMachine::addInstSelector(PassManagerBase &PM,
+                                         unsigned OptLevel) {
+  PM.add(createSparcISelDag(*this));
   return false;
 }
 
-/// addPassesToJITCompile - Add passes to the specified pass manager to
-/// implement a fast dynamic compiler for this target.
-///
-void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
-  // <insert instruction selector passes here>
-  PM.add(createRegisterAllocator());
-  PM.add(createPrologEpilogCodeInserter());
+/// addPreEmitPass - This pass may be implemented by targets that want to run
+/// passes immediately before machine code is emitted.  This should return
+/// true if -print-machineinstrs should print out the code after the passes.
+bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel){
+  PM.add(createSparcFPMoverPass(*this));
+  PM.add(createSparcDelaySlotFillerPass(*this));
+  return true;
+}
+
+bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
+                                            unsigned OptLevel,
+                                            bool Verbose,
+                                            raw_ostream &Out) {
+  // Output assembly language.
+  PM.add(createSparcCodePrinterPass(Out, *this, OptLevel, Verbose));
+  return false;
 }