X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FSparc%2FSparcTargetMachine.h;h=081075de2dc84dee5005f825354301e1fdd8aaa0;hb=6a2e7ac0b6647a409394e58b385e579ea62b5cba;hp=71c57aab1001ad115ad2444396c6debeb3244188;hpb=b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0;p=oota-llvm.git diff --git a/lib/Target/Sparc/SparcTargetMachine.h b/lib/Target/Sparc/SparcTargetMachine.h index 71c57aab100..081075de2dc 100644 --- a/lib/Target/Sparc/SparcTargetMachine.h +++ b/lib/Target/Sparc/SparcTargetMachine.h @@ -1,59 +1,85 @@ -//===-- SparcV8TargetMachine.h - Define TargetMachine for SparcV8 -*- C++ -*-=// +//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // -// This file declares the SparcV8 specific subclass of TargetMachine. +// This file declares the Sparc specific subclass of TargetMachine. // //===----------------------------------------------------------------------===// -#ifndef SPARCV8TARGETMACHINE_H -#define SPARCV8TARGETMACHINE_H +#ifndef SPARCTARGETMACHINE_H +#define SPARCTARGETMACHINE_H +#include "SparcFrameLowering.h" +#include "SparcISelLowering.h" +#include "SparcInstrInfo.h" +#include "SparcSelectionDAGInfo.h" +#include "SparcSubtarget.h" +#include "llvm/IR/DataLayout.h" +#include "llvm/Target/TargetFrameLowering.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetFrameInfo.h" -#include "llvm/PassManager.h" -#include "SparcV8InstrInfo.h" -#include "SparcV8JITInfo.h" namespace llvm { -class IntrinsicLowering; -class Module; - -class SparcV8TargetMachine : public TargetMachine { - SparcV8InstrInfo InstrInfo; - TargetFrameInfo FrameInfo; - SparcV8JITInfo JITInfo; +class SparcTargetMachine : public LLVMTargetMachine { + SparcSubtarget Subtarget; + const DataLayout DL; // Calculates type size & alignment + SparcInstrInfo InstrInfo; + SparcTargetLowering TLInfo; + SparcSelectionDAGInfo TSInfo; + SparcFrameLowering FrameLowering; public: - SparcV8TargetMachine(const Module &M, IntrinsicLowering *IL); + SparcTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL, bool is64bit); - virtual const SparcV8InstrInfo *getInstrInfo() const { return &InstrInfo; } - virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; } - virtual const MRegisterInfo *getRegisterInfo() const { + virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; } + virtual const TargetFrameLowering *getFrameLowering() const { + return &FrameLowering; + } + virtual const SparcSubtarget *getSubtargetImpl() const{ return &Subtarget; } + virtual const SparcRegisterInfo *getRegisterInfo() const { return &InstrInfo.getRegisterInfo(); } - virtual TargetJITInfo *getJITInfo() { - return &JITInfo; + virtual const SparcTargetLowering* getTargetLowering() const { + return &TLInfo; } + virtual const SparcSelectionDAGInfo* getSelectionDAGInfo() const { + return &TSInfo; + } + virtual const DataLayout *getDataLayout() const { return &DL; } - static unsigned getModuleMatchQuality(const Module &M); - static unsigned getJITMatchQuality(); + // Pass Pipeline Configuration + virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); +}; - /// addPassesToEmitMachineCode - Add passes to the specified pass manager to - /// get machine code emitted. This uses a MachineCodeEmitter object to handle - /// actually outputting the machine code and resolving things like the address - /// of functions. This method should returns true if machine code emission is - /// not supported. - /// - virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM, - MachineCodeEmitter &MCE); +/// SparcV8TargetMachine - Sparc 32-bit target machine +/// +class SparcV8TargetMachine : public SparcTargetMachine { + virtual void anchor(); +public: + SparcV8TargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); +}; - virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); +/// SparcV9TargetMachine - Sparc 64-bit target machine +/// +class SparcV9TargetMachine : public SparcTargetMachine { + virtual void anchor(); +public: + SparcV9TargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); }; } // end namespace llvm