X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FSparcV9%2FSparcV9TargetMachine.cpp;h=28b9734361c159ab7aaefdc83c7390dfd4e9fe34;hb=d344242f2e1e4a2ca272ee140a991141eedaa279;hp=dac4d208da7e733e3dca637f842b307b01201df9;hpb=9a3d63bcbe54e359bb908436053ed16cef77b9f7;p=oota-llvm.git diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp index dac4d208da7..28b9734361c 100644 --- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp +++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp @@ -1,22 +1,17 @@ -// $Id$ -//*************************************************************************** -// File: -// Sparc.cpp -// -// Purpose: -// -// History: -// 7/15/01 - Vikram Adve - Created -//**************************************************************************/ +//===-- Sparc.cpp - General implementation file for the Sparc Target ------===// +// +// This file contains the code for the Sparc Target that does not fit in any of +// the other files in this directory. +// +//===----------------------------------------------------------------------===// -#include "llvm/Target/Sparc.h" #include "SparcInternals.h" -#include "llvm/Method.h" -#include "llvm/CodeGen/InstrScheduling.h" -#include "llvm/CodeGen/InstrSelection.h" - -#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h" -#include "llvm/CodeGen/PhyRegAlloc.h" +#include "llvm/Target/Sparc.h" +#include "llvm/Function.h" +#include "llvm/BasicBlock.h" +#include "llvm/CodeGen/MachineCodeForMethod.h" +#include +using std::cerr; // Build the MachineInstruction Description Array... const MachineInstrDescriptor SparcMachineInstrDesc[] = { @@ -31,105 +26,69 @@ const MachineInstrDescriptor SparcMachineInstrDesc[] = { // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface) //---------------------------------------------------------------------------- -// -TargetMachine *allocateSparcTargetMachine() { return new UltraSparc(); } - - -//---------------------------------------------------------------------------- -// Entry point for register allocation for a module -//---------------------------------------------------------------------------- - -void AllocateRegisters(Method *M, TargetMachine &TM) -{ - - if ( (M)->isExternal() ) // don't process prototypes - return; - - if( DEBUG_RA ) { - cout << endl << "******************** Method "<< (M)->getName(); - cout << " ********************" <initializeResources(); + pos = false; // static stack area grows downwards + unsigned int autoVarsSize = mcInfo.getAutomaticVarsSize(); + return StaticAreaOffsetFromFP - autoVarsSize; } -void -UltraSparcSchedInfo::initializeResources() +int +UltraSparcFrameInfo::getTmpAreaOffset(MachineCodeForMethod& mcInfo, + bool& pos) const { - // Compute MachineSchedInfo::instrRUsages and MachineSchedInfo::issueGaps - MachineSchedInfo::initializeResources(); + mcInfo.freezeAutomaticVarsArea(); // ensure no more auto vars are added + mcInfo.freezeSpillsArea(); // ensure no more spill slots are added - // Machine-dependent fixups go here. None for now. + pos = false; // static stack area grows downwards + unsigned int autoVarsSize = mcInfo.getAutomaticVarsSize(); + unsigned int spillAreaSize = mcInfo.getRegSpillsSize(); + int offset = autoVarsSize + spillAreaSize; + return StaticAreaOffsetFromFP - offset; } - +int +UltraSparcFrameInfo::getDynamicAreaOffset(MachineCodeForMethod& mcInfo, + bool& pos) const +{ + // Dynamic stack area grows downwards starting at top of opt-args area. + // The opt-args, required-args, and register-save areas are empty except + // during calls and traps, so they are shifted downwards on each + // dynamic-size alloca. + pos = false; + unsigned int optArgsSize = mcInfo.getMaxOptionalArgsSize(); + if (int extra = optArgsSize % getStackFrameSizeAlignment()) + optArgsSize += (getStackFrameSizeAlignment() - extra); + int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP; + assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0); + return offset; +} //--------------------------------------------------------------------------- @@ -145,40 +104,15 @@ UltraSparcSchedInfo::initializeResources() UltraSparc::UltraSparc() : TargetMachine("UltraSparc-Native"), - instrInfo(), - schedInfo(&instrInfo), - regInfo( this ) + instrInfo(*this), + schedInfo(*this), + regInfo(*this), + frameInfo(*this), + cacheInfo(*this), + optInfo(*this) { optSizeForSubWordData = 4; minMemOpWordSize = 8; maxAtomicMemOpWordSize = 8; } - - - - -bool UltraSparc::compileMethod(Method *M) { - - if (SelectInstructionsForMethod(M, *this)) - { - cerr << "Instruction selection failed for method " << M->getName() - << "\n\n"; - return true; - } - - if (ScheduleInstructionsWithSSA(M, *this)) - { - cerr << "Instruction scheduling before allocation failed for method " - << M->getName() << "\n\n"; - return true; - } - - AllocateRegisters(M, *this); // allocate registers - - - return false; -} - - -