X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FTargetInstrInfo.cpp;h=10a5cdb6247a9fb44aa02a660203960c72d6f2e1;hb=ebcba612b537f45a033ccd9a60bee0c45e2e2ded;hp=d1413510fff27578b3c7a5b1f6a08342fa12dd5e;hpb=d9e9efb253978ce4a3683085d1f75c5734143bf9;p=oota-llvm.git diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp index d1413510fff..10a5cdb6247 100644 --- a/lib/Target/TargetInstrInfo.cpp +++ b/lib/Target/TargetInstrInfo.cpp @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -12,15 +12,14 @@ //===----------------------------------------------------------------------===// #include "llvm/Target/TargetInstrInfo.h" -#include "llvm/CodeGen/MachineInstr.h" #include "llvm/Constant.h" #include "llvm/DerivedTypes.h" using namespace llvm; /// findTiedToSrcOperand - Returns the operand that is tied to the specified /// dest operand. Returns -1 if there isn't one. -int TargetInstrDescriptor::findTiedToSrcOperand(unsigned OpNum) const { - for (unsigned i = 0, e = numOperands; i != e; ++i) { +int TargetInstrDesc::findTiedToSrcOperand(unsigned OpNum) const { + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { if (i == OpNum) continue; if (getOperandConstraint(i, TOI::TIED_TO) == (int)OpNum) @@ -30,57 +29,22 @@ int TargetInstrDescriptor::findTiedToSrcOperand(unsigned OpNum) const { } -TargetInstrInfo::TargetInstrInfo(const TargetInstrDescriptor* Desc, +TargetInstrInfo::TargetInstrInfo(const TargetInstrDesc* Desc, unsigned numOpcodes) - : desc(Desc), NumOpcodes(numOpcodes) { + : Descriptors(Desc), NumOpcodes(numOpcodes) { } TargetInstrInfo::~TargetInstrInfo() { } -// commuteInstruction - The default implementation of this method just exchanges -// operand 1 and 2. -MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI) const { - assert(MI->getOperand(1).isRegister() && MI->getOperand(2).isRegister() && - "This only knows how to commute register operands so far"); - unsigned Reg1 = MI->getOperand(1).getReg(); - unsigned Reg2 = MI->getOperand(2).getReg(); - bool Reg1IsKill = MI->getOperand(1).isKill(); - bool Reg2IsKill = MI->getOperand(2).isKill(); - MI->getOperand(2).setReg(Reg1); - MI->getOperand(1).setReg(Reg2); - if (Reg1IsKill) - MI->getOperand(2).setIsKill(); - else - MI->getOperand(2).unsetIsKill(); - if (Reg2IsKill) - MI->getOperand(1).setIsKill(); - else - MI->getOperand(1).unsetIsKill(); - return MI; -} - -bool TargetInstrInfo::PredicateInstruction(MachineInstr *MI, - std::vector &Cond) const { - bool MadeChange = false; - const TargetInstrDescriptor *TID = MI->getInstrDescriptor(); - if (TID->Flags & M_PREDICABLE) { - for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) { - if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) { - MachineOperand &MO = MI->getOperand(i); - if (MO.isReg()) { - MO.setReg(Cond[j].getReg()); - MadeChange = true; - } else if (MO.isImm()) { - MO.setImm(Cond[j].getImmedValue()); - MadeChange = true; - } else if (MO.isMBB()) { - MO.setMachineBasicBlock(Cond[j].getMachineBasicBlock()); - MadeChange = true; - } - ++j; - } - } - } - return MadeChange; +bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const { + const TargetInstrDesc &TID = MI->getDesc(); + if (!TID.isTerminator()) return false; + + // Conditional branch is a special case. + if (TID.isBranch() && !TID.isBarrier()) + return true; + if (!TID.isPredicable()) + return true; + return !isPredicated(MI); }