X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FTargetMachine.cpp;h=15164ca28dfc0a59f82bf593b9b74cc4670ff0f9;hb=e6be34a53ecbe8c2ff9f0793b13d847e94c0de91;hp=a9e376e10a9ad65b43f5f234e22b40c0be63b69e;hpb=b26bcc5087029ffe8037ed9036ff74430c6054cf;p=oota-llvm.git diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index a9e376e10a9..15164ca28df 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -1,279 +1,171 @@ //===-- TargetMachine.cpp - General Target Information ---------------------==// // +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// // This file describes the general parts of a Target machine. // //===----------------------------------------------------------------------===// -#include "llvm/Target/Machine.h" -#include "llvm/DerivedTypes.h" - -// External object describing the machine instructions -// Initialized only when the TargetMachine class is created -// and reset when that class is destroyed. -// -const MachineInstrDescriptor* TargetInstrDescriptors = NULL; - -resourceId_t MachineResource::nextId = 0; - -static cycles_t ComputeMinGap (const InstrRUsage& fromRU, - const InstrRUsage& toRU); +#include "llvm/Target/TargetAsmInfo.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetOptions.h" +#include "llvm/Support/CommandLine.h" +using namespace llvm; -static bool RUConflict (const vector& fromRVec, - const vector& fromRVec); - -//--------------------------------------------------------------------------- -// class TargetMachine -// -// Purpose: -// Machine description. -// //--------------------------------------------------------------------------- +// Command-line options that tend to be useful on more than one back-end. +// - -// function TargetMachine::findOptimalStorageSize -// -// Purpose: -// This default implementation assumes that all sub-word data items use -// space equal to optSizeForSubWordData, and all other primitive data -// items use space according to the type. -// -unsigned int TargetMachine::findOptimalStorageSize(const Type* ty) const { - switch(ty->getPrimitiveID()) { - case Type::BoolTyID: - case Type::UByteTyID: - case Type::SByteTyID: - case Type::UShortTyID: - case Type::ShortTyID: - return optSizeForSubWordData; - - default: - return DataLayout.getTypeSize(ty); - } -} - - -//--------------------------------------------------------------------------- -// class MachineInstructionInfo -// Interface to description of machine instructions -//--------------------------------------------------------------------------- - - -/*ctor*/ -MachineInstrInfo::MachineInstrInfo(const MachineInstrDescriptor* _desc, - unsigned int _descSize, - unsigned int _numRealOpCodes) - : desc(_desc), descSize(_descSize), numRealOpCodes(_numRealOpCodes) -{ - assert(TargetInstrDescriptors == NULL && desc != NULL); - TargetInstrDescriptors = desc; // initialize global variable -} - - -/*dtor*/ -MachineInstrInfo::~MachineInstrInfo() -{ - TargetInstrDescriptors = NULL; // reset global variable +namespace llvm { + bool PrintMachineCode; + bool NoFramePointerElim; + bool NoExcessFPPrecision; + bool UnsafeFPMath; + bool FiniteOnlyFPMathOption; + bool HonorSignDependentRoundingFPMathOption; + bool UseSoftFloat; + bool NoZerosInBSS; + bool ExceptionHandling; + Reloc::Model RelocationModel; + CodeModel::Model CMModel; + bool PerformTailCallOpt; } - - -bool -MachineInstrInfo::constantFitsInImmedField(MachineOpCode opCode, - int64_t intValue) const -{ - // First, check if opCode has an immed field. - bool isSignExtended; - uint64_t maxImmedValue = this->maxImmedConstant(opCode, isSignExtended); - if (maxImmedValue != 0) - { - // Now check if the constant fits - if (intValue <= (int64_t) maxImmedValue && - intValue >= -((int64_t) maxImmedValue+1)) - return true; - } - - return false; +namespace { + cl::opt PrintCode("print-machineinstrs", + cl::desc("Print generated machine code"), + cl::location(PrintMachineCode), cl::init(false)); + + cl::opt + DisableFPElim("disable-fp-elim", + cl::desc("Disable frame pointer elimination optimization"), + cl::location(NoFramePointerElim), + cl::init(false)); + cl::opt + DisableExcessPrecision("disable-excess-fp-precision", + cl::desc("Disable optimizations that may increase FP precision"), + cl::location(NoExcessFPPrecision), + cl::init(false)); + cl::opt + EnableUnsafeFPMath("enable-unsafe-fp-math", + cl::desc("Enable optimizations that may decrease FP precision"), + cl::location(UnsafeFPMath), + cl::init(false)); + cl::opt + EnableFiniteOnlyFPMath("enable-finite-only-fp-math", + cl::desc("Enable optimizations that assumes non- NaNs / +-Infs"), + cl::location(FiniteOnlyFPMathOption), + cl::init(false)); + cl::opt + EnableHonorSignDependentRoundingFPMath(cl::Hidden, + "enable-sign-dependent-rounding-fp-math", + cl::desc("Force codegen to assume rounding mode can change dynamically"), + cl::location(HonorSignDependentRoundingFPMathOption), + cl::init(false)); + + cl::opt + GenerateSoftFloatCalls("soft-float", + cl::desc("Generate software floating point library calls"), + cl::location(UseSoftFloat), + cl::init(false)); + cl::opt + DontPlaceZerosInBSS("nozero-initialized-in-bss", + cl::desc("Don't place zero-initialized symbols into bss section"), + cl::location(NoZerosInBSS), + cl::init(false)); + cl::opt + EnableExceptionHandling("enable-eh", + cl::desc("Exception handling should be emitted."), + cl::location(ExceptionHandling), + cl::init(false)); + + cl::opt + DefRelocationModel( + "relocation-model", + cl::desc("Choose relocation model"), + cl::location(RelocationModel), + cl::init(Reloc::Default), + cl::values( + clEnumValN(Reloc::Default, "default", + " Target default relocation model"), + clEnumValN(Reloc::Static, "static", + " Non-relocatable code"), + clEnumValN(Reloc::PIC_, "pic", + " Fully relocatable, position independent code"), + clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic", + " Relocatable external references, non-relocatable code"), + clEnumValEnd)); + cl::opt + DefCodeModel( + "code-model", + cl::desc("Choose code model"), + cl::location(CMModel), + cl::init(CodeModel::Default), + cl::values( + clEnumValN(CodeModel::Default, "default", + " Target default code model"), + clEnumValN(CodeModel::Small, "small", + " Small code model"), + clEnumValN(CodeModel::Kernel, "kernel", + " Kernel code model"), + clEnumValN(CodeModel::Medium, "medium", + " Medium code model"), + clEnumValN(CodeModel::Large, "large", + " Large code model"), + clEnumValEnd)); + + cl::opt + EnablePerformTailCallOpt("tailcallopt", + cl::desc("Turn on tail call optimization."), + cl::location(PerformTailCallOpt), + cl::init(false)); } - -//--------------------------------------------------------------------------- -// class MachineSchedInfo -// Interface to machine description for instruction scheduling //--------------------------------------------------------------------------- +// TargetMachine Class +// -/*ctor*/ -MachineSchedInfo::MachineSchedInfo(int _numSchedClasses, - const MachineInstrInfo* _mii, - const InstrClassRUsage* _classRUsages, - const InstrRUsageDelta* _usageDeltas, - const InstrIssueDelta* _issueDeltas, - unsigned int _numUsageDeltas, - unsigned int _numIssueDeltas) - : numSchedClasses(_numSchedClasses), - mii(_mii), - classRUsages(_classRUsages), - usageDeltas(_usageDeltas), - issueDeltas(_issueDeltas), - numUsageDeltas(_numUsageDeltas), - numIssueDeltas(_numIssueDeltas) -{ +TargetMachine::~TargetMachine() { + delete AsmInfo; } -void -MachineSchedInfo::initializeResources() -{ - assert(MAX_NUM_SLOTS >= (int) getMaxNumIssueTotal() - && "Insufficient slots for static data! Increase MAX_NUM_SLOTS"); - - // First, compute common resource usage info for each class because - // most instructions will probably behave the same as their class. - // Cannot allocate a vector of InstrRUsage so new each one. - // - vector instrRUForClasses; - instrRUForClasses.resize(numSchedClasses); - for (InstrSchedClass sc=0; sc < numSchedClasses; sc++) - { - // instrRUForClasses.push_back(new InstrRUsage); - instrRUForClasses[sc].setMaxSlots(getMaxNumIssueTotal()); - instrRUForClasses[sc] = classRUsages[sc]; - } - - computeInstrResources(instrRUForClasses); - - computeIssueGaps(instrRUForClasses); +/// getRelocationModel - Returns the code generation relocation model. The +/// choices are static, PIC, and dynamic-no-pic, and target default. +Reloc::Model TargetMachine::getRelocationModel() { + return RelocationModel; } - -void -MachineSchedInfo::computeInstrResources(const vector& instrRUForClasses) -{ - int numOpCodes = mii->getNumRealOpCodes(); - instrRUsages.resize(numOpCodes); - - // First get the resource usage information from the class resource usages. - for (MachineOpCode op=0; op < numOpCodes; op++) - { - InstrSchedClass sc = getSchedClass(op); - assert(sc >= 0 && sc < numSchedClasses); - instrRUsages[op] = instrRUForClasses[sc]; - } - - // Now, modify the resource usages as specified in the deltas. - for (unsigned i=0; i < numUsageDeltas; i++) - { - MachineOpCode op = usageDeltas[i].opCode; - assert(op < numOpCodes); - instrRUsages[op].addUsageDelta(usageDeltas[i]); - } - - // Then modify the issue restrictions as specified in the deltas. - for (unsigned i=0; i < numIssueDeltas; i++) - { - MachineOpCode op = issueDeltas[i].opCode; - assert(op < numOpCodes); - instrRUsages[issueDeltas[i].opCode].addIssueDelta(issueDeltas[i]); - } +/// setRelocationModel - Sets the code generation relocation model. +void TargetMachine::setRelocationModel(Reloc::Model Model) { + RelocationModel = Model; } - -void -MachineSchedInfo::computeIssueGaps(const vector& instrRUForClasses) -{ - int numOpCodes = mii->getNumRealOpCodes(); - instrRUsages.resize(numOpCodes); - - assert(numOpCodes < (1 << MAX_OPCODE_SIZE) - 1 - && "numOpCodes invalid for implementation of class OpCodePair!"); - - // First, compute issue gaps between pairs of classes based on common - // resources usages for each class, because most instruction pairs will - // usually behave the same as their class. - // - int classPairGaps[numSchedClasses][numSchedClasses]; - for (InstrSchedClass fromSC=0; fromSC < numSchedClasses; fromSC++) - for (InstrSchedClass toSC=0; toSC < numSchedClasses; toSC++) - { - int classPairGap = ComputeMinGap(instrRUForClasses[fromSC], - instrRUForClasses[toSC]); - classPairGaps[fromSC][toSC] = classPairGap; - } - - // Now, for each pair of instructions, use the class pair gap if both - // instructions have identical resource usage as their respective classes. - // If not, recompute the gap for the pair from scratch. - - longestIssueConflict = 0; - - for (MachineOpCode fromOp=0; fromOp < numOpCodes; fromOp++) - for (MachineOpCode toOp=0; toOp < numOpCodes; toOp++) - { - int instrPairGap = - (instrRUsages[fromOp].sameAsClass && instrRUsages[toOp].sameAsClass) - ? classPairGaps[getSchedClass(fromOp)][getSchedClass(toOp)] - : ComputeMinGap(instrRUsages[fromOp], instrRUsages[toOp]); - - if (instrPairGap > 0) - { - issueGaps[OpCodePair(fromOp,toOp)] = instrPairGap; - conflictLists[fromOp].push_back(toOp); - longestIssueConflict = max(longestIssueConflict, instrPairGap); - } - } +/// getCodeModel - Returns the code model. The choices are small, kernel, +/// medium, large, and target default. +CodeModel::Model TargetMachine::getCodeModel() { + return CMModel; } - -// Check if fromRVec and toRVec have *any* common entries. -// Assume the vectors are sorted in increasing order. -// Algorithm copied from function set_intersection() for sorted ranges (stl_algo.h). -inline static bool -RUConflict(const vector& fromRVec, - const vector& toRVec) -{ - bool commonElementFound = false; - - unsigned fN = fromRVec.size(), tN = toRVec.size(); - unsigned fi = 0, ti = 0; - while (fi < fN && ti < tN) - if (fromRVec[fi] < toRVec[ti]) - ++fi; - else if (toRVec[ti] < fromRVec[fi]) - ++ti; - else - { - commonElementFound = true; - break; - } - - return commonElementFound; +/// setCodeModel - Sets the code model. +void TargetMachine::setCodeModel(CodeModel::Model Model) { + CMModel = Model; } - -static cycles_t -ComputeMinGap(const InstrRUsage& fromRU, const InstrRUsage& toRU) -{ - cycles_t minGap = 0; - - if (fromRU.numBubbles > 0) - minGap = fromRU.numBubbles; - - if (minGap < fromRU.numCycles) - { - // only need to check from cycle `minGap' onwards - for (cycles_t gap=minGap; gap <= fromRU.numCycles-1; gap++) - { - // check if instr. #2 can start executing `gap' cycles after #1 - // by checking for resource conflicts in each overlapping cycle - cycles_t numOverlap = min(fromRU.numCycles - gap, toRU.numCycles); - for (cycles_t c = 0; c <= numOverlap-1; c++) - if (RUConflict(fromRU.resourcesByCycle[gap + c], - toRU.resourcesByCycle[c])) - {// conflict found so minGap must be more than `gap' - minGap = gap+1; - break; - } - } - } - - return minGap; +namespace llvm { + /// FiniteOnlyFPMath - This returns true when the -enable-finite-only-fp-math + /// option is specified on the command line. If this returns false (default), + /// the code generator is not allowed to assume that FP arithmetic arguments + /// and results are never NaNs or +-Infs. + bool FiniteOnlyFPMath() { return UnsafeFPMath || FiniteOnlyFPMathOption; } + + /// HonorSignDependentRoundingFPMath - Return true if the codegen must assume + /// that the rounding mode of the FPU can change from its default. + bool HonorSignDependentRoundingFPMath() { + return !UnsafeFPMath && HonorSignDependentRoundingFPMathOption; + } } -//---------------------------------------------------------------------------