X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FTargetRegisterInfo.cpp;h=2395f2ba12ac83c6456047cd5145f9e8cfe7fda7;hb=e88ed0934637a21f02ef5dc8b01075c0f8870d11;hp=532e6d231891b7367a94714aecdc10af1fd1c30f;hpb=fd87839a4888840ab5718fd116ab169ac04126af;p=oota-llvm.git diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index 532e6d23189..2395f2ba12a 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -46,6 +46,27 @@ void PrintReg::print(raw_ostream &OS) const { } } +void PrintRegUnit::print(raw_ostream &OS) const { + // Generic printout when TRI is missing. + if (!TRI) { + OS << "Unit~" << Unit; + return; + } + + // Check for invalid register units. + if (Unit >= TRI->getNumRegUnits()) { + OS << "BadUnit~" << Unit; + return; + } + + // Normal units have at least one root. + MCRegUnitRootIterator Roots(Unit, TRI); + assert(Roots.isValid() && "Unit has no roots."); + OS << TRI->getName(*Roots); + for (++Roots; Roots.isValid(); ++Roots) + OS << '~' << TRI->getName(*Roots); +} + /// getAllocatableClass - Return the maximal subclass of the given register /// class that is alloctable, or NULL. const TargetRegisterClass * @@ -143,17 +164,7 @@ TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, // Register classes are ordered topologically, so the largest common // sub-class it the common sub-class with the smallest ID. - const unsigned *SubA = A->getSubClassMask(); - const unsigned *SubB = B->getSubClassMask(); - - // We could start the search from max(A.ID, B.ID), but we are only going to - // execute 2-3 iterations anyway. - for (unsigned Base = 0, BaseE = getNumRegClasses(); Base < BaseE; Base += 32) - if (unsigned Common = *SubA++ & *SubB++) - return getRegClass(Base + CountTrailingZeros_32(Common)); - - // No common sub-class exists. - return NULL; + return firstCommonClass(A->getSubClassMask(), B->getSubClassMask(), this); } const TargetRegisterClass * @@ -164,23 +175,11 @@ TargetRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, assert(Idx && "Bad sub-register index"); // Find Idx in the list of super-register indices. - const uint32_t *Mask = 0; for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI) - if (RCI.getSubReg() == Idx) { - Mask = RCI.getMask(); - break; - } - if (!Mask) - return 0; - - // The bit mask contains all register classes that are projected into B by - // Idx. Find a class that is also a sub-class of A. - const uint32_t *SC = A->getSubClassMask(); - - // Find the first common register class in TV and SC. - for (unsigned Base = 0, BaseE = getNumRegClasses(); Base < BaseE; Base += 32) - if (unsigned Common = *Mask++ & *SC++) - return getRegClass(Base + CountTrailingZeros_32(Common)); + if (RCI.getSubReg() == Idx) + // The bit mask contains all register classes that are projected into B + // by Idx. Find a class that is also a sub-class of A. + return firstCommonClass(RCI.getMask(), A->getSubClassMask(), this); return 0; } @@ -207,6 +206,7 @@ getCommonSuperRegClass(const TargetRegisterClass *RCA, unsigned SubA, unsigned *BestPreB = &PreB; if (RCA->getSize() < RCB->getSize()) { std::swap(RCA, RCB); + std::swap(SubA, SubB); std::swap(BestPreA, BestPreB); }