X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FTargetRegisterInfo.cpp;h=a84fdaa4a8029f8a2b09c71c0eab0220939b49f9;hb=941222eea05cb5e0bf6b1789c3d6beb4e66cc375;hp=11f1b3d070f48d40f1fa9e1c628ca6f4e2deaa0c;hpb=6f0d024a534af18d9e60b3ea757376cd8a3a980e;p=oota-llvm.git diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index 11f1b3d070f..a84fdaa4a80 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -22,8 +22,14 @@ using namespace llvm; TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR, regclass_iterator RCB, regclass_iterator RCE, - int CFSO, int CFDO) - : Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) { + int CFSO, int CFDO, + const unsigned* subregs, const unsigned subregsize, + const unsigned* superregs, const unsigned superregsize, + const unsigned* aliases, const unsigned aliasessize) + : SubregHash(subregs), SubregHashSize(subregsize), + SuperregHash(superregs), SuperregHashSize(superregsize), + AliasesHash(aliases), AliasesHashSize(aliasessize), + Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) { assert(NumRegs < FirstVirtualRegister && "Target has too many physical registers!"); @@ -34,19 +40,25 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR, TargetRegisterInfo::~TargetRegisterInfo() {} /// getPhysicalRegisterRegClass - Returns the Register Class of a physical -/// register. +/// register of the given type. If type is MVT::Other, then just return any +/// register class the register belongs to. const TargetRegisterClass * -TargetRegisterInfo::getPhysicalRegisterRegClass(MVT::ValueType VT, - unsigned reg) const { +TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const { assert(isPhysicalRegister(reg) && "reg must be a physical register"); - // Pick the register class of the right type that contains this physreg. - for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I) - if ((*I)->hasType(VT) && (*I)->contains(reg)) - return *I; - assert(false && "Couldn't find the register class"); - return 0; -} + // Pick the most super register class of the right type that contains + // this physreg. + const TargetRegisterClass* BestRC = 0; + for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ + const TargetRegisterClass* RC = *I; + if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) && + (!BestRC || BestRC->hasSuperClass(RC))) + BestRC = RC; + } + + assert(BestRC && "Couldn't find the register class"); + return BestRC; +} /// getAllocatableSetForRC - Toggle the bits that represent allocatable /// registers for the specific register class. @@ -88,3 +100,45 @@ TargetRegisterInfo::getInitialFrameState(std::vector &Moves) const // Default is to do nothing. } +const TargetRegisterClass * +llvm::getCommonSubClass(const TargetRegisterClass *A, + const TargetRegisterClass *B) { + // First take care of the trivial cases + if (A == B) + return A; + if (!A || !B) + return 0; + + // If B is a subclass of A, it will be handled in the loop below + if (B->hasSubClass(A)) + return A; + + const TargetRegisterClass *Best = 0; + for (TargetRegisterClass::sc_iterator I = A->subclasses_begin(); + const TargetRegisterClass *X = *I; ++I) { + if (X == B) + return B; // B is a subclass of A + + // X must be a common subclass of A and B + if (!B->hasSubClass(X)) + continue; + + // A superclass is definitely better. + if (!Best || Best->hasSuperClass(X)) { + Best = X; + continue; + } + + // A subclass is definitely worse + if (Best->hasSubClass(X)) + continue; + + // Best and *I have no super/sub class relation - pick the larger class, or + // the smaller spill size. + int nb = std::distance(Best->begin(), Best->end()); + int ni = std::distance(X->begin(), X->end()); + if (ni>nb || (ni==nb && X->getSize() < Best->getSize())) + Best = X; + } + return Best; +}