X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FTargetRegisterInfo.cpp;h=d9911e9e9a1840213e5afd99e45334071c2df13f;hb=d24479730a8790d82c4859dc477bc2416d7a6bda;hp=9c8de12108ce11fde07f79eaa90b4e6a0521118e;hpb=682f81032ffeac6ce9c0337816dfa0e051c9d636;p=oota-llvm.git diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index 9c8de12108c..d9911e9e9a1 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -22,8 +22,10 @@ using namespace llvm; TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR, regclass_iterator RCB, regclass_iterator RCE, - int CFSO, int CFDO) - : Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) { + int CFSO, int CFDO, + const unsigned* subregs, const unsigned subregsize) + : SubregHash(subregs), SubregHashSize(subregsize), Desc(D), NumRegs(NR), + RegClassBegin(RCB), RegClassEnd(RCE) { assert(NumRegs < FirstVirtualRegister && "Target has too many physical registers!"); @@ -33,43 +35,25 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR, TargetRegisterInfo::~TargetRegisterInfo() {} -namespace { - // Sort according to super- / sub- class relations. - // i.e. super- register class < sub- register class. - struct RCCompare { - bool operator()(const TargetRegisterClass* const &LHS, - const TargetRegisterClass* const &RHS) { - return RHS->hasSuperClass(LHS); - } - }; -} - /// getPhysicalRegisterRegClass - Returns the Register Class of a physical /// register of the given type. If type is MVT::Other, then just return any /// register class the register belongs to. const TargetRegisterClass * -TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, - MVT::ValueType VT) const { +TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const { assert(isPhysicalRegister(reg) && "reg must be a physical register"); - // Pick the register class of the right type that contains this physreg. - SmallVector RCs; + // Pick the most super register class of the right type that contains + // this physreg. + const TargetRegisterClass* BestRC = 0; for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ - if ((VT == MVT::Other || (*I)->hasType(VT)) && (*I)->contains(reg)) - RCs.push_back(*I); - } - - if (RCs.size() == 1) - return RCs[0]; - - if (RCs.size()) { - // Multiple compatible register classes. Get the super- class. - std::stable_sort(RCs.begin(), RCs.end(), RCCompare()); - return RCs[0]; + const TargetRegisterClass* RC = *I; + if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) && + (!BestRC || BestRC->hasSuperClass(RC))) + BestRC = RC; } - assert(false && "Couldn't find the register class"); - return 0; + assert(BestRC && "Couldn't find the register class"); + return BestRC; } /// getAllocatableSetForRC - Toggle the bits that represent allocatable