X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FTargetRegisterInfo.cpp;h=d9911e9e9a1840213e5afd99e45334071c2df13f;hb=d24479730a8790d82c4859dc477bc2416d7a6bda;hp=e69496f4b287ba372c2f4871a9c1d999d07027c6;hpb=1360b7d8f8d1969026870d18c582b4e3a7cff8b8;p=oota-llvm.git

diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp
index e69496f4b28..d9911e9e9a1 100644
--- a/lib/Target/TargetRegisterInfo.cpp
+++ b/lib/Target/TargetRegisterInfo.cpp
@@ -22,38 +22,19 @@ using namespace llvm;
 
 TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
                              regclass_iterator RCB, regclass_iterator RCE,
-                             int CFSO, int CFDO)
-  : Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) {
+                             int CFSO, int CFDO,
+                             const unsigned* subregs, const unsigned subregsize)
+  : SubregHash(subregs), SubregHashSize(subregsize), Desc(D), NumRegs(NR),
+    RegClassBegin(RCB), RegClassEnd(RCE) {
   assert(NumRegs < FirstVirtualRegister &&
          "Target has too many physical registers!");
 
   CallFrameSetupOpcode   = CFSO;
   CallFrameDestroyOpcode = CFDO;
-  
-  for (unsigned i = 0; i < NumRegs; ++i) {
-    const TargetRegisterDesc* CurrReg = Desc + i;
-    
-    // Initialize the Subregs set, which stores pairs (a, b) where
-    // b is a subreg of a.
-    if (CurrReg->SubRegs)
-      for (const unsigned* CurrSR = CurrReg->SubRegs; *CurrSR; ++CurrSR)
-        Subregs.insert(std::make_pair(i, *CurrSR));
-  }
 }
 
 TargetRegisterInfo::~TargetRegisterInfo() {}
 
-namespace {
-  // Sort according to super- / sub- class relations.
-  // i.e. super- register class < sub- register class.
-  struct RCCompare {
-    bool operator()(const TargetRegisterClass* const &LHS,
-                    const TargetRegisterClass* const &RHS) {
-      return RHS->hasSuperClass(LHS);
-    }
-  };
-}
-
 /// getPhysicalRegisterRegClass - Returns the Register Class of a physical
 /// register of the given type. If type is MVT::Other, then just return any
 /// register class the register belongs to.
@@ -61,24 +42,18 @@ const TargetRegisterClass *
 TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const {
   assert(isPhysicalRegister(reg) && "reg must be a physical register");
 
-  // Pick the register class of the right type that contains this physreg.
-  SmallVector<const TargetRegisterClass*, 4> RCs;
+  // Pick the most super register class of the right type that contains
+  // this physreg.
+  const TargetRegisterClass* BestRC = 0;
   for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){
-    if ((VT == MVT::Other || (*I)->hasType(VT)) && (*I)->contains(reg))
-      RCs.push_back(*I);
-  }
-
-  if (RCs.size() == 1)
-    return RCs[0];
-
-  if (RCs.size()) {
-    // Multiple compatible register classes. Get the super- class.
-    std::stable_sort(RCs.begin(), RCs.end(), RCCompare());
-    return RCs[0];
+    const TargetRegisterClass* RC = *I;
+    if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) &&
+        (!BestRC || BestRC->hasSuperClass(RC)))
+      BestRC = RC;
   }
 
-  assert(false && "Couldn't find the register class");
-  return 0;
+  assert(BestRC && "Couldn't find the register class");
+  return BestRC;
 }
 
 /// getAllocatableSetForRC - Toggle the bits that represent allocatable