X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FTargetSchedule.td;h=38461c5a380ed79c8a356af6319714e603499c02;hb=963a97f1a365c8d09ca681e922371f9ec3473ee8;hp=89c00cdc702f874cb8b21a624bb0465990a954fe;hpb=0de8796e68d49d57f4135aa40a1c72b03aa8ecca;p=oota-llvm.git diff --git a/lib/Target/TargetSchedule.td b/lib/Target/TargetSchedule.td index 89c00cdc702..38461c5a380 100644 --- a/lib/Target/TargetSchedule.td +++ b/lib/Target/TargetSchedule.td @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by James M. Laskey and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -28,8 +28,8 @@ class FuncUnit; // need to complete the stage. Units represent the choice of functional units // that can be used to complete the stage. Eg. IntUnit1, IntUnit2. // -class InstrStage units> { - int Latency = latency; // length of stage in machine cycles +class InstrStage units> { + int Cycles = cycles; // length of stage in machine cycles list Units = units; // choice of functional units } @@ -47,6 +47,7 @@ class InstrStage units> { // instruction information. // class InstrItinClass; +def NoItinerary : InstrItinClass; //===----------------------------------------------------------------------===// // Instruction itinerary data - These values provide a runtime map of an @@ -64,3 +65,8 @@ class InstrItinData stages> { class ProcessorItineraries iid> { list IID = iid; } + +// NoItineraries - A marker that can be used by processors without schedule +// info. +def NoItineraries : ProcessorItineraries<[]>; +