X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FMakefile;h=e518fecf044fd68ec576c26f8acabeaa63f0bebe;hb=9f51f8f7e70fb7fbaff887224ac4ebec3125ae45;hp=99c23f59b4248a09f8acd2b716272bee4f44a116;hpb=e488e9360b1a865ba604330965edcf139e590b65;p=oota-llvm.git

diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile
index 99c23f59b42..e518fecf044 100644
--- a/lib/Target/X86/Makefile
+++ b/lib/Target/X86/Makefile
@@ -1,44 +1,23 @@
-##===- lib/Target/X86/Makefile ----------------------------*- Makefile -*-===##
-# 
+##===- lib/Target/X86/Makefile -----------------------------*- Makefile -*-===##
+#
 #                     The LLVM Compiler Infrastructure
 #
-# This file was developed by the LLVM research group and is distributed under
-# the University of Illinois Open Source License. See LICENSE.TXT for details.
-# 
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
 ##===----------------------------------------------------------------------===##
+
 LEVEL = ../../..
-LIBRARYNAME = x86
-include $(LEVEL)/Makefile.common
+LIBRARYNAME = LLVMX86CodeGen
+TARGET = X86
 
 # Make sure that tblgen is run, first thing.
-$(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
-                 X86GenRegisterInfo.inc X86GenInstrNames.inc \
-                 X86GenInstrInfo.inc X86GenInstrSelector.inc
-
-X86GenRegisterNames.inc::  X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
-	@echo "Building $< register names with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
-
-X86GenRegisterInfo.h.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
-	@echo "Building $< register information header with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
+BUILT_SOURCES = X86GenRegisterInfo.inc X86GenInstrInfo.inc \
+		X86GenAsmWriter.inc X86GenAsmMatcher.inc \
+                X86GenAsmWriter1.inc X86GenDAGISel.inc  \
+                X86GenDisassemblerTables.inc X86GenFastISel.inc \
+                X86GenCallingConv.inc X86GenSubtargetInfo.inc
 
-X86GenRegisterInfo.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
-	@echo "Building $< register information implementation with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
-
-X86GenInstrNames.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
-	@echo "Building $< instruction names with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
-
-X86GenInstrInfo.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
-	@echo "Building $< instruction information with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
-
-X86GenInstrSelector.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
-	@echo "Building $< instruction selector with tblgen"
-	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
-
-clean::
-	$(VERB) rm -f *.inc
+DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc Utils
 
+include $(LEVEL)/Makefile.common