X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86.h;h=27e88505150b4b4cef2bb5d3ee356be296bf7620;hb=1292c226458b68a119d3a387a0527f453b2065c2;hp=c29fef2e607beb4e2b328204c6a9f9daf1740abd;hpb=8e44f0756ffdcba4aeddee00dd643b3839acd434;p=oota-llvm.git diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h index c29fef2e607..27e88505150 100644 --- a/lib/Target/X86/X86.h +++ b/lib/Target/X86/X86.h @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -15,33 +15,29 @@ #ifndef TARGET_X86_H #define TARGET_X86_H -#include +#include "llvm/Target/TargetMachine.h" namespace llvm { -class TargetMachine; -class PassManager; class FunctionPass; -class IntrinsicLowering; +class JITCodeEmitter; +class MCCodeEmitter; +class MCContext; class MachineCodeEmitter; - -extern bool X86PatIsel; - -/// createX86ISelPattern - This pass converts an LLVM function into a -/// machine code representation using pattern matching and a machine -/// description file. -/// -FunctionPass *createX86ISelPattern(TargetMachine &TM); +class Target; +class TargetAsmBackend; +class X86TargetMachine; +class formatted_raw_ostream; /// createX86ISelDag - This pass converts a legalized DAG into a /// X86-specific DAG, ready for instruction scheduling. /// -FunctionPass *createX86ISelDag(TargetMachine &TM); +FunctionPass *createX86ISelDag(X86TargetMachine &TM, + CodeGenOpt::Level OptLevel); -/// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole -/// optimizations. -/// -FunctionPass *createX86PeepholeOptimizerPass(); +/// createGlobalBaseRegPass - This pass initializes a global base +/// register for PIC on x86-32. +FunctionPass* createGlobalBaseRegPass(); /// createX86FloatingPointStackifierPass - This function returns a pass which /// converts floating point register references and pseudo instructions into @@ -49,21 +45,22 @@ FunctionPass *createX86PeepholeOptimizerPass(); /// FunctionPass *createX86FloatingPointStackifierPass(); -/// createX86CodePrinterPass - Returns a pass that prints the X86 -/// assembly code for a MachineFunction to the given output stream, -/// using the given target machine description. -/// -FunctionPass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm); +/// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain +/// crossings. +FunctionPass *createSSEDomainFixPass(); /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code /// to the specified MCE object. -FunctionPass *createX86CodeEmitterPass(MachineCodeEmitter &MCE); +FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM, + JITCodeEmitter &JCE); -/// addX86ELFObjectWriterPass - Add passes to the FPM that output the generated -/// code as an ELF object file. -/// -void addX86ELFObjectWriterPass(PassManager &FPM, - std::ostream &o, TargetMachine &tm); +MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM, + MCContext &Ctx); +MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM, + MCContext &Ctx); + +TargetAsmBackend *createX86_32AsmBackend(const Target &, const std::string &); +TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &); /// createX86EmitCodeToMemory - Returns a pass that converts a register /// allocated function into raw machine code in a dynamically @@ -71,6 +68,14 @@ void addX86ELFObjectWriterPass(PassManager &FPM, /// FunctionPass *createEmitX86CodeToMemory(); +/// createX86MaxStackAlignmentHeuristicPass - This function returns a pass +/// which determines whether the frame pointer register should be +/// reserved in case dynamic stack alignment is later required. +/// +FunctionPass *createX86MaxStackAlignmentHeuristicPass(); + +extern Target TheX86_32Target, TheX86_64Target; + } // End llvm namespace // Defines symbolic names for X86 registers. This defines a mapping from