X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86.h;h=27e88505150b4b4cef2bb5d3ee356be296bf7620;hb=d9e3385ced2dc887e2fe8e1c071bd2611e4d3ede;hp=6f7707c762fc3c78838c89b30025e8b9146fdce1;hpb=0e0a7a45d3d0a8c865a078459d2e1c6d8967a100;p=oota-llvm.git

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 6f7707c762f..27e88505150 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -15,46 +15,29 @@
 #ifndef TARGET_X86_H
 #define TARGET_X86_H
 
-#include <iosfwd>
+#include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
 
-class TargetMachine;
 class FunctionPass;
-class IntrinsicLowering;
-
-enum X86VectorEnum {
-  NoSSE, SSE, SSE2, SSE3
-};
-
-extern X86VectorEnum X86Vector;
-
-/// createX86SimpleInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation in a very simple peep-hole fashion.  The
-/// generated code sucks but the implementation is nice and simple.
+class JITCodeEmitter;
+class MCCodeEmitter;
+class MCContext;
+class MachineCodeEmitter;
+class Target;
+class TargetAsmBackend;
+class X86TargetMachine;
+class formatted_raw_ostream;
+
+/// createX86ISelDag - This pass converts a legalized DAG into a 
+/// X86-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM);
+FunctionPass *createX86ISelDag(X86TargetMachine &TM,
+                               CodeGenOpt::Level OptLevel);
 
-/// createX86PatternInstructionSelector - This pass converts an LLVM function
-/// into a machine code representation in a more aggressive way.
-///
-FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM);
-
-/// createX86SSAPeepholeOptimizerPass - Create a pass to perform SSA-based X86
-/// specific peephole optimizations.
-///
-FunctionPass *createX86SSAPeepholeOptimizerPass();
-
-/// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole
-/// optimizations.
-///
-FunctionPass *createX86PeepholeOptimizerPass();
-
-/// createX86FloatingPointKiller - This function returns a pass which
-/// kills every floating point register at the end of each basic block
-/// because our FloatingPointStackifier cannot handle them.
-///
-FunctionPass *createX86FloatingPointKillerPass();
+/// createGlobalBaseRegPass - This pass initializes a global base
+/// register for PIC on x86-32.
+FunctionPass* createGlobalBaseRegPass();
 
 /// createX86FloatingPointStackifierPass - This function returns a pass which
 /// converts floating point register references and pseudo instructions into
@@ -62,12 +45,22 @@ FunctionPass *createX86FloatingPointKillerPass();
 ///
 FunctionPass *createX86FloatingPointStackifierPass();
 
-/// createX86CodePrinterPass - Returns a pass that prints the X86
-/// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description.  This should work
-/// regardless of whether the function is in SSA form.
-///
-FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
+/// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain
+/// crossings.
+FunctionPass *createSSEDomainFixPass();
+
+/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
+/// to the specified MCE object.
+FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
+                                          JITCodeEmitter &JCE);
+
+MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM,
+                                         MCContext &Ctx);
+MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM,
+                                         MCContext &Ctx);
+
+TargetAsmBackend *createX86_32AsmBackend(const Target &, const std::string &);
+TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &);
 
 /// createX86EmitCodeToMemory - Returns a pass that converts a register
 /// allocated function into raw machine code in a dynamically
@@ -75,6 +68,14 @@ FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm);
 ///
 FunctionPass *createEmitX86CodeToMemory();
 
+/// createX86MaxStackAlignmentHeuristicPass - This function returns a pass
+/// which determines whether the frame pointer register should be
+/// reserved in case dynamic stack alignment is later required.
+///
+FunctionPass *createX86MaxStackAlignmentHeuristicPass();
+
+extern Target TheX86_32Target, TheX86_64Target;
+
 } // End llvm namespace
 
 // Defines symbolic names for X86 registers.  This defines a mapping from