X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86.h;h=54e2861a5f6e8d173029b5671d748f8bb7ba22c5;hb=7ba92306db91d45eec4fafe9aa8a6fb4af276c50;hp=10bc017993ce1be4bf4a2e7990a447e6ec0edaf0;hpb=6aab9cf65cd1e96f9d0fa99f8453da454648bba1;p=oota-llvm.git diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h index 10bc017993c..54e2861a5f6 100644 --- a/lib/Target/X86/X86.h +++ b/lib/Target/X86/X86.h @@ -1,60 +1,84 @@ //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// // // This file contains the entry points for global functions defined in the x86 // target library, as used by the LLVM JIT. // -// FIXME: This file will be dramatically changed in the future -// //===----------------------------------------------------------------------===// #ifndef TARGET_X86_H #define TARGET_X86_H #include + +namespace llvm { + class TargetMachine; -class Pass; +class FunctionPass; +class IntrinsicLowering; -/// createSimpleX86InstructionSelector - This pass converts an LLVM function -/// into a machine code representation is a very simple peep-hole fashion. The +/// createX86SimpleInstructionSelector - This pass converts an LLVM function +/// into a machine code representation in a very simple peep-hole fashion. The /// generated code sucks but the implementation is nice and simple. /// -Pass *createSimpleX86InstructionSelector(TargetMachine &TM); +FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM); + +/// createX86PatternInstructionSelector - This pass converts an LLVM function +/// into a machine code representation using pattern matching and a machine +/// description file. +/// +FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM); + +/// createX86SSAPeepholeOptimizerPass - Create a pass to perform SSA-based X86 +/// specific peephole optimizations. +/// +FunctionPass *createX86SSAPeepholeOptimizerPass(); + +/// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole +/// optimizations. +/// +FunctionPass *createX86PeepholeOptimizerPass(); + +/// createX86FloatingPointKiller - This function returns a pass which +/// kills every floating point register at the end of each basic block +/// because our FloatingPointStackifier cannot handle them. +/// +FunctionPass *createX86FloatingPointKillerPass(); -/// X86SimpleRegisterAllocation - This function converts the specified machine -/// code function from SSA form to use explicit registers by spilling every -/// register. Wow, great policy huh? +/// createX86FloatingPointStackifierPass - This function returns a pass which +/// converts floating point register references and pseudo instructions into +/// floating point stack references and physical instructions. /// -Pass *createSimpleX86RegisterAllocator(TargetMachine &TM); +FunctionPass *createX86FloatingPointStackifierPass(); -/// createX86CodePrinterPass - Print out the specified machine code function to -/// the specified stream. This function should work regardless of whether or -/// not the function is in SSA form or not. +/// createX86CodePrinterPass - Returns a pass that prints the X86 +/// assembly code for a MachineFunction to the given output stream, +/// using the given target machine description. This should work +/// regardless of whether the function is in SSA form. /// -Pass *createX86CodePrinterPass(TargetMachine &TM, std::ostream &O); +FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm); -/// X86EmitCodeToMemory - This function converts a register allocated function -/// into raw machine code in a dynamically allocated chunk of memory. A pointer -/// to the start of the function is returned. +/// createX86EmitCodeToMemory - Returns a pass that converts a register +/// allocated function into raw machine code in a dynamically +/// allocated chunk of memory. /// -Pass *createEmitX86CodeToMemory(TargetMachine &TM); +FunctionPass *createEmitX86CodeToMemory(); + +// Defines symbolic names for X86 registers. This defines a mapping from +// register name to register number. +// +} // End llvm namespace + +#include "X86GenRegisterNames.inc" -// Put symbolic names in a namespace to avoid causing these to clash with all -// kinds of other things... +// Defines symbolic names for the X86 instructions. // -namespace X86 { - // Defines a large number of symbolic names for X86 registers. This defines a - // mapping from register name to register number. - // - enum Register { -#define R(ENUM, NAME, FLAGS, TSFLAGS) ENUM, -#include "X86RegisterInfo.def" - }; - - // This defines a large number of symbolic names for X86 instruction opcodes. - enum Opcode { -#define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS) ENUM, -#include "X86InstrInfo.def" - }; -} +#include "X86GenInstrNames.inc" #endif