X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86InstrArithmetic.td;h=f82e1c666ed80b493aeef975ac8542a9459f12f4;hb=8caa290a77cc6e71457fcc6b6bfac907510dc0f4;hp=b4f71b991515470f6827ccc0375dc48bc6ed6ebf;hpb=9649e9acdd6efb64385f6076d997f802163440be;p=oota-llvm.git diff --git a/lib/Target/X86/X86InstrArithmetic.td b/lib/Target/X86/X86InstrArithmetic.td index b4f71b99151..f82e1c666ed 100644 --- a/lib/Target/X86/X86InstrArithmetic.td +++ b/lib/Target/X86/X86InstrArithmetic.td @@ -839,14 +839,16 @@ multiclass ArithBinOp_RF BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4, def #NAME#64rm : BinOpRM_RF; let isConvertibleToThreeAddress = ConvertibleToThreeAddress in { + // NOTE: These are order specific, we want the ri8 forms to be listed + // first so that they are slightly preferred to the ri forms. + def #NAME#16ri8 : BinOpRI8_RF<0x82, mnemonic, Xi16, opnodeflag, RegMRM>; + def #NAME#32ri8 : BinOpRI8_RF<0x82, mnemonic, Xi32, opnodeflag, RegMRM>; + def #NAME#64ri8 : BinOpRI8_RF<0x82, mnemonic, Xi64, opnodeflag, RegMRM>; + def #NAME#8ri : BinOpRI_RF<0x80, mnemonic, Xi8 , opnodeflag, RegMRM>; def #NAME#16ri : BinOpRI_RF<0x80, mnemonic, Xi16, opnodeflag, RegMRM>; def #NAME#32ri : BinOpRI_RF<0x80, mnemonic, Xi32, opnodeflag, RegMRM>; def #NAME#64ri32: BinOpRI_RF<0x80, mnemonic, Xi64, opnodeflag, RegMRM>; - - def #NAME#16ri8 : BinOpRI8_RF<0x82, mnemonic, Xi16, opnodeflag, RegMRM>; - def #NAME#32ri8 : BinOpRI8_RF<0x82, mnemonic, Xi32, opnodeflag, RegMRM>; - def #NAME#64ri8 : BinOpRI8_RF<0x82, mnemonic, Xi64, opnodeflag, RegMRM>; } } // Constraints = "$src1 = $dst" @@ -855,15 +857,17 @@ multiclass ArithBinOp_RF BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4, def #NAME#32mr : BinOpMR_RMW; def #NAME#64mr : BinOpMR_RMW; + // NOTE: These are order specific, we want the mi8 forms to be listed + // first so that they are slightly preferred to the mi forms. + def #NAME#16mi8 : BinOpMI8_RMW; + def #NAME#32mi8 : BinOpMI8_RMW; + def #NAME#64mi8 : BinOpMI8_RMW; + def #NAME#8mi : BinOpMI_RMW; def #NAME#16mi : BinOpMI_RMW; def #NAME#32mi : BinOpMI_RMW; def #NAME#64mi32 : BinOpMI_RMW; - def #NAME#16mi8 : BinOpMI8_RMW; - def #NAME#32mi8 : BinOpMI8_RMW; - def #NAME#64mi8 : BinOpMI8_RMW; - def #NAME#8i8 : BinOpAI; def #NAME#16i16 : BinOpAI; def #NAME#32i32 : BinOpAI; @@ -900,14 +904,16 @@ multiclass ArithBinOp_R BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4, def #NAME#64rm : BinOpRM_R; let isConvertibleToThreeAddress = ConvertibleToThreeAddress in { + // NOTE: These are order specific, we want the ri8 forms to be listed + // first so that they are slightly preferred to the ri forms. + def #NAME#16ri8 : BinOpRI8_R<0x82, mnemonic, Xi16, opnode, RegMRM>; + def #NAME#32ri8 : BinOpRI8_R<0x82, mnemonic, Xi32, opnode, RegMRM>; + def #NAME#64ri8 : BinOpRI8_R<0x82, mnemonic, Xi64, opnode, RegMRM>; + def #NAME#8ri : BinOpRI_R<0x80, mnemonic, Xi8 , opnode, RegMRM>; def #NAME#16ri : BinOpRI_R<0x80, mnemonic, Xi16, opnode, RegMRM>; def #NAME#32ri : BinOpRI_R<0x80, mnemonic, Xi32, opnode, RegMRM>; def #NAME#64ri32: BinOpRI_R<0x80, mnemonic, Xi64, opnode, RegMRM>; - - def #NAME#16ri8 : BinOpRI8_R<0x82, mnemonic, Xi16, opnode, RegMRM>; - def #NAME#32ri8 : BinOpRI8_R<0x82, mnemonic, Xi32, opnode, RegMRM>; - def #NAME#64ri8 : BinOpRI8_R<0x82, mnemonic, Xi64, opnode, RegMRM>; } } // Constraints = "$src1 = $dst" @@ -916,15 +922,17 @@ multiclass ArithBinOp_R BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4, def #NAME#32mr : BinOpMR_RMW; def #NAME#64mr : BinOpMR_RMW; + // NOTE: These are order specific, we want the mi8 forms to be listed + // first so that they are slightly preferred to the mi forms. + def #NAME#16mi8 : BinOpMI8_RMW; + def #NAME#32mi8 : BinOpMI8_RMW; + def #NAME#64mi8 : BinOpMI8_RMW; + def #NAME#8mi : BinOpMI_RMW; def #NAME#16mi : BinOpMI_RMW; def #NAME#32mi : BinOpMI_RMW; def #NAME#64mi32 : BinOpMI_RMW; - def #NAME#16mi8 : BinOpMI8_RMW; - def #NAME#32mi8 : BinOpMI8_RMW; - def #NAME#64mi8 : BinOpMI8_RMW; - def #NAME#8i8 : BinOpAI; def #NAME#16i16 : BinOpAI; def #NAME#32i32 : BinOpAI; @@ -960,14 +968,16 @@ multiclass ArithBinOp_F BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4, def #NAME#64rm : BinOpRM_F; let isConvertibleToThreeAddress = ConvertibleToThreeAddress in { + // NOTE: These are order specific, we want the ri8 forms to be listed + // first so that they are slightly preferred to the ri forms. + def #NAME#16ri8 : BinOpRI8_F<0x82, mnemonic, Xi16, opnode, RegMRM>; + def #NAME#32ri8 : BinOpRI8_F<0x82, mnemonic, Xi32, opnode, RegMRM>; + def #NAME#64ri8 : BinOpRI8_F<0x82, mnemonic, Xi64, opnode, RegMRM>; + def #NAME#8ri : BinOpRI_F<0x80, mnemonic, Xi8 , opnode, RegMRM>; def #NAME#16ri : BinOpRI_F<0x80, mnemonic, Xi16, opnode, RegMRM>; def #NAME#32ri : BinOpRI_F<0x80, mnemonic, Xi32, opnode, RegMRM>; def #NAME#64ri32: BinOpRI_F<0x80, mnemonic, Xi64, opnode, RegMRM>; - - def #NAME#16ri8 : BinOpRI8_F<0x82, mnemonic, Xi16, opnode, RegMRM>; - def #NAME#32ri8 : BinOpRI8_F<0x82, mnemonic, Xi32, opnode, RegMRM>; - def #NAME#64ri8 : BinOpRI8_F<0x82, mnemonic, Xi64, opnode, RegMRM>; } def #NAME#8mr : BinOpMR_F; @@ -975,15 +985,17 @@ multiclass ArithBinOp_F BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4, def #NAME#32mr : BinOpMR_F; def #NAME#64mr : BinOpMR_F; + // NOTE: These are order specific, we want the mi8 forms to be listed + // first so that they are slightly preferred to the mi forms. + def #NAME#16mi8 : BinOpMI8_F; + def #NAME#32mi8 : BinOpMI8_F; + def #NAME#64mi8 : BinOpMI8_F; + def #NAME#8mi : BinOpMI_F; def #NAME#16mi : BinOpMI_F; def #NAME#32mi : BinOpMI_F; def #NAME#64mi32 : BinOpMI_F; - def #NAME#16mi8 : BinOpMI8_F; - def #NAME#32mi8 : BinOpMI8_F; - def #NAME#64mi8 : BinOpMI8_F; - def #NAME#8i8 : BinOpAI; def #NAME#16i16 : BinOpAI; def #NAME#32i32 : BinOpAI;